Changeset 39cea6a in mainline


Ignore:
Timestamp:
2006-04-13T17:38:03Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e185136
Parents:
897ad60
Message:

Cleanup pm.c and pm.h code on ia32 and amd64.
Add before_task_runs() and before_task_runs_arch() for each architecture.
Add ia32 and amd64 code to ensure I/O Permission Bitmap update.

Files:
17 edited

Legend:

Unmodified
Added
Removed

  • arch/amd64/include/pm.h

    r897ad60 r39cea6a  
    6767#define DPL_USER        (PL_USER<<5)
    6868
    69 #define IO_MAP_BASE     (104)
     69#define TSS_BASIC_SIZE  104
    7070
    7171#ifndef __ASM__
    … …  
    8383        unsigned base_24_31: 8;
    8484} __attribute__ ((packed));
     85typedef struct descriptor descriptor_t;
    8586
    8687struct tss_descriptor {
    … …  
    8990        unsigned base_16_23: 8;
    9091        unsigned type: 4;
    91         unsigned  : 1;
     92        unsigned : 1;
    9293        unsigned dpl : 2;
    9394        unsigned present : 1;
    … …  
    100101        unsigned  : 32;
    101102} __attribute__ ((packed));
     103typedef struct tss_descriptor tss_descriptor_t;
    102104
    103105struct idescriptor {
    … …  
    113115        unsigned  : 32;
    114116} __attribute__ ((packed));
     117typedef struct idescriptor idescriptor_t;
    115118
    116119struct ptr_16_64 {
    … …  
    118121        __u64 base;
    119122} __attribute__ ((packed));
     123typedef struct ptr_16_64 ptr_16_64_t;
    120124
    121125struct ptr_16_32 {
    … …  
    123127        __u32 base;
    124128} __attribute__ ((packed));
     129typedef struct ptr_16_32 ptr_16_32_t;
    125130
    126131struct tss {
    … …  
    142147        __u8 iomap[0x10000 + 1];        /* 64K + 1 terminating byte */
    143148} __attribute__ ((packed));
     149typedef struct tss tss_t;
    144150
    145 extern struct tss *tss_p;
     151extern tss_t *tss_p;
    146152
    147 extern struct descriptor gdt[];
    148 extern struct idescriptor idt[];
     153extern descriptor_t gdt[];
     154extern idescriptor_t idt[];
    149155
    150 extern struct ptr_16_64 gdtr;
    151 extern struct ptr_16_32 bootstrap_gdtr;
    152 extern struct ptr_16_32 protected_ap_gdtr;
     156extern ptr_16_64_t gdtr;
     157extern ptr_16_32_t bootstrap_gdtr;
     158extern ptr_16_32_t protected_ap_gdtr;
    153159
    154160extern void pm_init(void);
    155161
    156 extern void gdt_tss_setbase(struct descriptor *d, __address base);
    157 extern void gdt_tss_setlimit(struct descriptor *d, __u32 limit);
     162extern void gdt_tss_setbase(descriptor_t *d, __address base);
     163extern void gdt_tss_setlimit(descriptor_t *d, __u32 limit);
    158164
    159165extern void idt_init(void);
    160 extern void idt_setoffset(struct idescriptor *d, __address offset);
     166extern void idt_setoffset(idescriptor_t *d, __address offset);
    161167
    162 extern void tss_initialize(struct tss *t);
     168extern void tss_initialize(tss_t *t);
    163169
    164170#endif /* __ASM__ */

  • arch/amd64/src/cpu/cpu.c

    r897ad60 r39cea6a  
    119119{
    120120        CPU->arch.tss = tss_p;
    121         CPU->fpu_owner=NULL;
     121        CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
     122        CPU->fpu_owner = NULL;
    122123}
    123 
    124124
    125125void cpu_identify(void)

  • arch/amd64/src/pm.c

    r897ad60 r39cea6a  
    4747 */
    4848
    49 struct descriptor gdt[GDT_ITEMS] = {
     49descriptor_t gdt[GDT_ITEMS] = {
    5050        /* NULL descriptor */
    5151        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
    … …  
    111111};
    112112
    113 struct idescriptor idt[IDT_ITEMS];
    114 
    115 struct ptr_16_64 gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt };
    116 struct ptr_16_64 idtr = {.limit = sizeof(idt), .base= (__u64) idt };
    117 
    118 static struct tss tss;
    119 struct tss *tss_p = NULL;
    120 
    121 void gdt_tss_setbase(struct descriptor *d, __address base)
    122 {
    123         struct tss_descriptor *td = (struct tss_descriptor *) d;
     113idescriptor_t idt[IDT_ITEMS];
     114
     115ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base= (__u64) gdt };
     116ptr_16_64_t idtr = {.limit = sizeof(idt), .base= (__u64) idt };
     117
     118static tss_t tss;
     119tss_t *tss_p = NULL;
     120
     121void gdt_tss_setbase(descriptor_t *d, __address base)
     122{
     123        tss_descriptor_t *td = (tss_descriptor_t *) d;
    124124
    125125        td->base_0_15 = base & 0xffff;
    … …  
    129129}
    130130
    131 void gdt_tss_setlimit(struct descriptor *d, __u32 limit)
    132 {
    133         struct tss_descriptor *td = (struct tss_descriptor *) d;
     131void gdt_tss_setlimit(descriptor_t *d, __u32 limit)
     132{
     133        struct tss_descriptor *td = (tss_descriptor_t *) d;
    134134
    135135        td->limit_0_15 = limit & 0xffff;
    … …  
    137137}
    138138
    139 void idt_setoffset(struct idescriptor *d, __address offset)
     139void idt_setoffset(idescriptor_t *d, __address offset)
    140140{
    141141        /*
    … …  
    147147}
    148148
    149 void tss_initialize(struct tss *t)
    150 {
    151         memsetb((__address) t, sizeof(struct tss), 0);
     149void tss_initialize(tss_t *t)
     150{
     151        memsetb((__address) t, sizeof(tss_t), 0);
    152152}
    153153
    … …  
    157157void idt_init(void)
    158158{
    159         struct idescriptor *d;
     159        idescriptor_t *d;
    160160        int i;
    161161
    … …  
    184184void pm_init(void)
    185185{
    186         struct descriptor *gdt_p = (struct descriptor *) gdtr.base;
    187         struct tss_descriptor *tss_desc;
     186        descriptor_t *gdt_p = (struct descriptor *) gdtr.base;
     187        tss_descriptor_t *tss_desc;
    188188
    189189        /*
    … …  
    201201        }
    202202        else {
    203                 tss_p = (struct tss *) malloc(sizeof(struct tss),FRAME_ATOMIC);
     203                tss_p = (struct tss *) malloc(sizeof(tss_t), FRAME_ATOMIC);
    204204                if (!tss_p)
    205205                        panic("could not allocate TSS\n");
    … …  
    208208        tss_initialize(tss_p);
    209209
    210         tss_desc = (struct tss_descriptor *) (&gdt_p[TSS_DES]);
     210        tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]);
    211211        tss_desc->present = 1;
    212212        tss_desc->type = AR_TSS;
    … …  
    214214       
    215215        gdt_tss_setbase(&gdt_p[TSS_DES], (__address) tss_p);
    216         gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
     216        gdt_tss_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
    217217
    218218        gdtr_load(&gdtr);

  • arch/amd64/src/proc/scheduler.c

    r897ad60 r39cea6a  
    2929#include <proc/scheduler.h>
    3030#include <cpu.h>
     31#include <proc/task.h>
    3132#include <proc/thread.h>
    3233#include <arch.h>
    … …  
    3536#include <arch/debugger.h>
    3637#include <print.h>
     38#include <arch/pm.h>
    3739
     40/** Perform amd64 specific tasks needed before the new task is run. */
     41void before_task_runs_arch(void)
     42{
     43}
     44
     45/** Perform amd64 specific tasks needed before the new thread is scheduled. */
    3846void before_thread_runs_arch(void)
    3947{
     48        size_t iomap_size;
     49        ptr_16_64_t cpugdtr;
     50        descriptor_t *gdt_p;
     51
    4052        CPU->arch.tss->rsp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
    4153
    … …  
    4355         * hidden part of gs */
    4456        swapgs();
    45         write_msr(AMD_MSR_GS,
    46                   (__u64)&THREAD->kstack);
     57        write_msr(AMD_MSR_GS, (__u64)&THREAD->kstack);
    4758        swapgs();
    4859
    4960        /* TLS support - set FS to thread local storage */
    5061        write_msr(AMD_MSR_FS, THREAD->arch.tls);
     62
     63        /*
     64         * Switch the I/O Permission Bitmap, if necessary.
     65         *
     66         * First, copy the I/O Permission Bitmap.
     67         * This needs to be changed so that the
     68         * copying is avoided if the same task
     69         * was already running and the iomap did
     70         * not change.
     71         */
     72        spinlock_lock(&TASK->lock);
     73        iomap_size = TASK->arch.iomap_size;
     74        if (iomap_size) {
     75                ASSERT(TASK->arch.iomap);
     76                memcpy(CPU->arch.tss->iomap, TASK->arch.iomap, iomap_size);
     77                CPU->arch.tss->iomap[iomap_size] = 0xff;        /* terminating byte */
     78        }
     79        spinlock_unlock(&TASK->lock);
     80
     81        /* Second, adjust TSS segment limit. */
     82        gdtr_store(&cpugdtr);
     83        gdt_p = (descriptor_t *) cpugdtr.base;
     84        gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + iomap_size - 1);
     85        gdtr_load(&cpugdtr);
    5186
    5287#ifdef CONFIG_DEBUG_AS_WATCHPOINT

  • arch/ia32/include/asm.h

    r897ad60 r39cea6a  
    257257 * @param gdtr_reg Address of memory from where to load GDTR.
    258258 */
    259 static inline void gdtr_load(struct ptr_16_32 *gdtr_reg)
     259static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
    260260{
    261261        __asm__ volatile ("lgdt %0\n" : : "m" (*gdtr_reg));
    … …  
    266266 * @param gdtr_reg Address of memory to where to load GDTR.
    267267 */
    268 static inline void gdtr_store(struct ptr_16_32 *gdtr_reg)
     268static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
    269269{
    270270        __asm__ volatile ("sgdt %0\n" : : "m" (*gdtr_reg));
    … …  
    275275 * @param idtr_reg Address of memory from where to load IDTR.
    276276 */
    277 static inline void idtr_load(struct ptr_16_32 *idtr_reg)
     277static inline void idtr_load(ptr_16_32_t *idtr_reg)
    278278{
    279279        __asm__ volatile ("lidt %0\n" : : "m" (*idtr_reg));

  • arch/ia32/include/pm.h

    r897ad60 r39cea6a  
    5656#define DPL_USER        (PL_USER<<5)
    5757
    58 #define IO_MAP_BASE     (104)
     58#define TSS_BASIC_SIZE  104
    5959
    6060#ifndef __ASM__
    … …  
    6868        __u32 base;
    6969} __attribute__ ((packed));
     70typedef struct ptr_16_32 ptr_16_32_t;
    7071
    7172struct descriptor {
    … …  
    8182        unsigned base_24_31: 8;
    8283} __attribute__ ((packed));
     84typedef struct descriptor  descriptor_t;
    8385
    8486struct idescriptor {
    … …  
    8991        unsigned offset_16_31: 16;
    9092} __attribute__ ((packed));
    91 
     93typedef struct idescriptor idescriptor_t;
    9294
    9395struct tss {
    … …  
    132134        __u8 iomap[0x10000+1];  /* 64K + 1 terminating byte */
    133135} __attribute__ ((packed));
     136typedef struct tss tss_t;
    134137
    135 extern struct ptr_16_32 gdtr;
    136 extern struct ptr_16_32 bootstrap_gdtr;
    137 extern struct ptr_16_32 protected_ap_gdtr;
     138extern ptr_16_32_t gdtr;
     139extern ptr_16_32_t bootstrap_gdtr;
     140extern ptr_16_32_t protected_ap_gdtr;
    138141extern struct tss *tss_p;
    139142
    140 extern struct descriptor gdt[];
     143extern descriptor_t gdt[];
    141144
    142145extern void pm_init(void);
    143146
    144 extern void gdt_setbase(struct descriptor *d, __address base);
    145 extern void gdt_setlimit(struct descriptor *d, __u32 limit);
     147extern void gdt_setbase(descriptor_t *d, __address base);
     148extern void gdt_setlimit(descriptor_t *d, __u32 limit);
    146149
    147150extern void idt_init(void);
    148 extern void idt_setoffset(struct idescriptor *d, __address offset);
     151extern void idt_setoffset(idescriptor_t *d, __address offset);
    149152
    150 extern void tss_initialize(struct tss *t);
     153extern void tss_initialize(tss_t *t);
    151154extern void set_tls_desc(__address tls);
    152155

  • arch/ia32/src/cpu/cpu.c

    r897ad60 r39cea6a  
    8888}
    8989
    90 
    91 
    92 
    9390void cpu_arch_init(void)
    9491{
    95         __u32 help=0;
     92        cpuid_feature_info fi;
     93        cpuid_extended_feature_info efi;
     94        cpu_info_t info;
     95        __u32 help = 0;
    9696       
    9797        CPU->arch.tss = tss_p;
    98         CPU->fpu_owner=NULL;
     98        CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
    9999
    100         cpuid_feature_info fi;
    101         cpuid_extended_feature_info efi;
     100        CPU->fpu_owner = NULL;
    102101
    103         cpu_info_t info;
    104102        cpuid(1, &info);
    105103
    106         fi.word=info.cpuid_edx;
    107         efi.word=info.cpuid_ecx;
     104        fi.word = info.cpuid_edx;
     105        efi.word = info.cpuid_ecx;
    108106       
    109         if(fi.bits.fxsr)        fpu_fxsr();
    110         else fpu_fsr();
     107        if (fi.bits.fxsr)
     108                fpu_fxsr();
     109        else
     110                fpu_fsr();     
    111111       
    112         if(fi.bits.sse) asm volatile (
    113                 "mov %%cr4,%0;\n"
    114                 "or %1,%0;\n"
    115                 "mov %0,%%cr4;\n"
    116                 :"+r"(help)
    117                 :"i"(CR4_OSFXSR_MASK|(1<<10))
    118         );
    119        
     112        if (fi.bits.sse) {
     113                asm volatile (
     114                        "mov %%cr4,%0\n"
     115                        "or %1,%0\n"
     116                        "mov %0,%%cr4\n"
     117                        : "+r" (help)
     118                        : "i" (CR4_OSFXSR_MASK|(1<<10))
     119                );
     120        }
    120121}
    121 
    122122
    123123void cpu_identify(void)

  • arch/ia32/src/pm.c

    r897ad60 r39cea6a  
    5353 * structure in it's base.
    5454 */
    55 struct descriptor gdt[GDT_ITEMS] = {
     55descriptor_t gdt[GDT_ITEMS] = {
    5656        /* NULL descriptor */
    5757        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
    … …  
    6969};
    7070
    71 static struct idescriptor idt[IDT_ITEMS];
    72 
    73 static struct tss tss;
    74 
    75 struct tss *tss_p = NULL;
     71static idescriptor_t idt[IDT_ITEMS];
     72
     73static tss_t tss;
     74
     75tss_t *tss_p = NULL;
    7676
    7777/* gdtr is changed by kmp before next CPU is initialized */
    78 struct ptr_16_32 bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
    79 struct ptr_16_32 gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
    80 
    81 void gdt_setbase(struct descriptor *d, __address base)
     78ptr_16_32_t bootstrap_gdtr = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
     79ptr_16_32_t gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
     80
     81void gdt_setbase(descriptor_t *d, __address base)
    8282{
    8383        d->base_0_15 = base & 0xffff;
    … …  
    8686}
    8787
    88 void gdt_setlimit(struct descriptor *d, __u32 limit)
     88void gdt_setlimit(descriptor_t *d, __u32 limit)
    8989{
    9090        d->limit_0_15 = limit & 0xffff;
    … …  
    9292}
    9393
    94 void idt_setoffset(struct idescriptor *d, __address offset)
     94void idt_setoffset(idescriptor_t *d, __address offset)
    9595{
    9696        /*
    … …  
    101101}
    102102
    103 void tss_initialize(struct tss *t)
     103void tss_initialize(tss_t *t)
    104104{
    105105        memsetb((__address) t, sizeof(struct tss), 0);
    … …  
    111111void idt_init(void)
    112112{
    113         struct idescriptor *d;
     113        idescriptor_t *d;
    114114        int i;
    115115
    … …  
    142142static void clean_IOPL_NT_flags(void)
    143143{
    144         asm
    145         (
    146                 "pushfl;"
    147                 "pop %%eax;"
    148                 "and $0xffff8fff,%%eax;"
    149                 "push %%eax;"
    150                 "popfl;"
    151                 :
    152                 :
    153                 :"%eax"
     144        __asm__ volatile (
     145                "pushfl\n"
     146                "pop %%eax\n"
     147                "and $0xffff8fff, %%eax\n"
     148                "push %%eax\n"
     149                "popfl\n"
     150                : : : "eax"
    154151        );
    155152}
    … …  
    158155static void clean_AM_flag(void)
    159156{
    160         asm
    161         (
    162                 "mov %%cr0,%%eax;"
    163                 "and $0xFFFBFFFF,%%eax;"
    164                 "mov %%eax,%%cr0;"
    165                 :
    166                 :
    167                 :"%eax"
     157        __asm__ volatile (
     158                "mov %%cr0, %%eax\n"
     159                "and $0xfffbffff, %%eax\n"
     160                "mov %%eax, %%cr0\n"
     161                : : : "eax"
    168162        );
    169163}
    … …  
    171165void pm_init(void)
    172166{
    173         struct descriptor *gdt_p = (struct descriptor *) gdtr.base;
    174         struct ptr_16_32 idtr;
     167        descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
     168        ptr_16_32_t idtr;
    175169
    176170        /*
    … …  
    196190        }
    197191        else {
    198                 tss_p = (struct tss *) malloc(sizeof(struct tss),FRAME_ATOMIC);
     192                tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
    199193                if (!tss_p)
    200194                        panic("could not allocate TSS\n");
    … …  
    208202       
    209203        gdt_setbase(&gdt_p[TSS_DES], (__address) tss_p);
    210         gdt_setlimit(&gdt_p[TSS_DES], sizeof(struct tss) - 1);
     204        gdt_setlimit(&gdt_p[TSS_DES], sizeof(tss_t) - 1);
    211205
    212206        /*
    … …  
    222216void set_tls_desc(__address tls)
    223217{
    224         struct ptr_16_32 cpugdtr;
    225         struct descriptor *gdt_p = (struct descriptor *) cpugdtr.base;
     218        ptr_16_32_t cpugdtr;
     219        descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
    226220
    227221        gdtr_store(&cpugdtr);

  • arch/ia32/src/proc/scheduler.c

    r897ad60 r39cea6a  
    2929#include <proc/scheduler.h>
    3030#include <cpu.h>
     31#include <proc/task.h>
    3132#include <proc/thread.h>
    3233#include <arch.h>
    … …  
    3435#include <arch/debugger.h>
    3536#include <arch/pm.h>
     37#include <arch/asm.h>
    3638
     39/** Perform ia32 specific tasks needed before the new task is run. */
     40void before_task_runs_arch(void)
     41{
     42}
     43
     44/** Perform ia32 specific tasks needed before the new thread is scheduled.
     45 *
     46 * THREAD is locked and interrupts are disabled.
     47 */
    3748void before_thread_runs_arch(void)
    3849{
     50        size_t iomap_size;
     51        ptr_16_32_t cpugdtr;
     52        descriptor_t *gdt_p;
     53
    3954        CPU->arch.tss->esp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
    4055        CPU->arch.tss->ss0 = selector(KDATA_DES);
    … …  
    4257        /* Set up TLS in GS register */
    4358        set_tls_desc(THREAD->arch.tls);
     59
     60        /*
     61         * Switch the I/O Permission Bitmap, if necessary.
     62         *
     63         * First, copy the I/O Permission Bitmap.
     64         * This needs to be changed so that the
     65         * copying is avoided if the same task
     66         * was already running and the iomap did
     67         * not change.
     68         */
     69        spinlock_lock(&TASK->lock);
     70        iomap_size = TASK->arch.iomap_size;
     71        if (iomap_size) {
     72                ASSERT(TASK->arch.iomap);
     73                memcpy(CPU->arch.tss->iomap, TASK->arch.iomap, iomap_size);
     74                CPU->arch.tss->iomap[iomap_size] = 0xff;        /* terminating byte */
     75        }
     76        spinlock_unlock(&TASK->lock);   
     77
     78        /* Second, adjust TSS segment limit. */
     79        gdtr_store(&cpugdtr);
     80        gdt_p = (descriptor_t *) cpugdtr.base;
     81        gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + iomap_size - 1);
     82        gdtr_load(&cpugdtr);
    4483
    4584#ifdef CONFIG_DEBUG_AS_WATCHPOINT

  • arch/ia64/src/proc/scheduler.c

    r897ad60 r39cea6a  
    3737#include <align.h>
    3838
     39/** Perform ia64 specific tasks needed before the new task is run. */
     40void before_task_runs_arch(void)
     41{
     42}
     43
    3944/** Prepare kernel stack pointers in bank 0 r22 and r23 and make sure the stack is mapped in DTR. */
    4045void before_thread_runs_arch(void)

  • arch/mips32/src/mips32.c

    r897ad60 r39cea6a  
    137137}
    138138
     139/** Perform mips32 specific tasks needed before the new task is run. */
     140void before_task_runs_arch(void)
     141{
     142}
     143
     144/** Perform mips32 specific tasks needed before the new thread is scheduled. */
    139145void before_thread_runs_arch(void)
    140146{

  • arch/ppc32/src/proc/scheduler.c

    r897ad60 r39cea6a  
    3535__address supervisor_sp_physical;
    3636
     37/** Perform ppc32 specific tasks needed before the new task is run. */
     38void before_task_runs_arch(void)
     39{
     40}
     41
     42/** Perform ppc32 specific tasks needed before the new thread is scheduled. */
    3743void before_thread_runs_arch(void)
    3844{

  • arch/ppc64/src/proc/scheduler.c

    r897ad60 r39cea6a  
    3535__address supervisor_sp_physical;
    3636
     37/** Perform ppc64 specific tasks needed before the new task is run. */
     38void before_task_runs_arch(void)
     39{
     40}
     41
     42/** Perform ppc64 specific tasks needed before the new thread is scheduled. */
    3743void before_thread_runs_arch(void)
    3844{

  • arch/sparc64/src/proc/scheduler.c

    r897ad60 r39cea6a  
    3535#include <align.h>
    3636
     37/** Perform sparc64 specific tasks needed before the new task is run. */
     38void before_task_runs_arch(void)
     39{
     40}
     41
    3742/** Ensure that thread's kernel stack is locked in TLB. */
    3843void before_thread_runs_arch(void)

  • generic/include/proc/scheduler.h

    r897ad60 r39cea6a  
    5353extern void kcpulb(void *arg);
    5454
    55 extern void before_thread_runs(void);
    56 extern void after_thread_ran(void);
    57 
    5855extern void sched_print_list(void);
    5956
    … …  
    6158 * To be defined by architectures:
    6259 */
     60extern void before_task_runs_arch(void);
    6361extern void before_thread_runs_arch(void);
    6462extern void after_thread_ran_arch(void);

  • generic/include/proc/task.h

    r897ad60 r39cea6a  
    5353        atomic_t active_calls;  /**< Active asynchronous messages */
    5454       
    55         task_arch_t arch;
     55        task_arch_t arch;       /**< Architecture specific task data. */
    5656};
    5757

  • generic/src/proc/scheduler.c

    r897ad60 r39cea6a  
    4848#include <debug.h>
    4949
     50static void before_task_runs(void);
     51static void before_thread_runs(void);
     52static void after_thread_ran(void);
    5053static void scheduler_separated_stack(void);
    5154
    5255atomic_t nrdy;  /**< Number of ready threads in the system. */
     56
     57/** Carry out actions before new task runs. */
     58void before_task_runs(void)
     59{
     60        before_task_runs_arch();
     61}
    5362
    5463/** Take actions before new thread runs.
    … …  
    435444                }
    436445                TASK = THREAD->task;
     446                before_task_runs();
    437447        }
    438448
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