Changeset 3b543d5 in mainline for uspace


Ignore:
Timestamp:
2011-05-06T15:55:43Z (14 years ago)
Author:
Matus Dekanek <smekideki@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e78660f
Parents:
d0c060b (diff), 6c6a95d2 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

merge from usb/development

Location:
uspace
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/ehci-hcd/ehci-hcd.ma

    rd0c060b r3b543d5  
    2210 pci/ven=1002&dev=4386
    3310 pci/ven=1002&dev=4396
     410 pci/ven=1002&dev=4373
    4510 pci/ven=1022&dev=7463
    5610 pci/ven=1022&dev=7808
  • uspace/drv/ehci-hcd/pci.c

    rd0c060b r3b543d5  
    186186        CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) to read PCI config space.\n",
    187187            ret);
    188         usb_log_info("Register space BAR at %p:%" PRIxn ".\n", (void *) address, value);
     188        usb_log_info("Register space BAR at %p:%" PRIxn ".\n",
     189            (void *) address, value);
    189190
    190191        /* clear lower byte, it's not part of the BASE address */
  • uspace/drv/ohci/hc.c

    rd0c060b r3b543d5  
    4545#include "hcd_endpoint.h"
    4646
     47#define OHCI_USED_INTERRUPTS \
     48    (I_SO | I_WDH | I_UE | I_RHSC)
    4749static int interrupt_emulator(hc_t *instance);
    4850static void hc_gain_control(hc_t *instance);
     
    285287{
    286288        assert(instance);
    287         if ((status & ~IS_SF) == 0) /* ignore sof status */
     289        usb_log_debug("OHCI interrupt: %x.\n", status);
     290        if ((status & ~I_SF) == 0) /* ignore sof status */
    288291                return;
    289         if (status & IS_RHSC)
     292        if (status & I_RHSC)
    290293                rh_interrupt(&instance->rh);
    291294
    292         usb_log_debug("OHCI interrupt: %x.\n", status);
    293 
    294         if (status & IS_WDH) {
     295
     296        if (status & I_WDH) {
    295297                fibril_mutex_lock(&instance->guard);
    296298                usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
     
    332334{
    333335        assert(instance);
     336        usb_log_debug("Requesting OHCI control.\n");
    334337        /* Turn off legacy emulation */
    335338        volatile uint32_t *ohci_emulation_reg =
     
    337340        usb_log_debug("OHCI legacy register %p: %x.\n",
    338341                ohci_emulation_reg, *ohci_emulation_reg);
    339         *ohci_emulation_reg = 0;
     342        *ohci_emulation_reg &= ~0x1;
    340343
    341344        /* Interrupt routing enabled => smm driver is active */
     
    421424            instance->registers->control);
    422425
    423         /* Disable interrupts */
    424         instance->registers->interrupt_disable = I_SF | I_OC;
    425         usb_log_debug2("Disabling interrupts: %x.\n",
    426             instance->registers->interrupt_disable);
    427         instance->registers->interrupt_disable = I_MI;
     426        /* Enable interrupts */
     427        instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
    428428        usb_log_debug2("Enabled interrupts: %x.\n",
    429429            instance->registers->interrupt_enable);
     430        instance->registers->interrupt_enable = I_MI;
    430431
    431432        /* Set periodic start to 90% */
     
    492493            instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
    493494
     495        /* Init interrupt code */
     496        instance->interrupt_code.cmds = instance->interrupt_commands;
     497        {
     498                /* Read status register */
     499                instance->interrupt_commands[0].cmd = CMD_MEM_READ_32;
     500                instance->interrupt_commands[0].dstarg = 1;
     501                instance->interrupt_commands[0].addr =
     502                    (void*)&instance->registers->interrupt_status;
     503
     504                /* Test whether we are the interrupt cause */
     505                instance->interrupt_commands[1].cmd = CMD_BTEST;
     506                instance->interrupt_commands[1].value =
     507                    OHCI_USED_INTERRUPTS;
     508                instance->interrupt_commands[1].srcarg = 1;
     509                instance->interrupt_commands[1].dstarg = 2;
     510
     511                /* Predicate cleaning and accepting */
     512                instance->interrupt_commands[2].cmd = CMD_PREDICATE;
     513                instance->interrupt_commands[2].value = 2;
     514                instance->interrupt_commands[2].srcarg = 2;
     515
     516                /* Write clean status register */
     517                instance->interrupt_commands[3].cmd = CMD_MEM_WRITE_A_32;
     518                instance->interrupt_commands[3].srcarg = 1;
     519                instance->interrupt_commands[3].addr =
     520                    (void*)&instance->registers->interrupt_status;
     521
     522                /* Accept interrupt */
     523                instance->interrupt_commands[4].cmd = CMD_ACCEPT;
     524
     525                instance->interrupt_code.cmdcount = OHCI_NEEDED_IRQ_COMMANDS;
     526        }
     527
    494528        return EOK;
    495529}
  • uspace/drv/ohci/hc.h

    rd0c060b r3b543d5  
    5151#include "hw_struct/hcca.h"
    5252
     53#define OHCI_NEEDED_IRQ_COMMANDS 5
     54
    5355typedef struct hc {
    5456        ohci_regs_t *registers;
     
    6567        fid_t interrupt_emulator;
    6668        fibril_mutex_t guard;
     69
     70        /** Code to be executed in kernel interrupt handler */
     71        irq_code_t interrupt_code;
     72
     73        /** Commands that form interrupt code */
     74        irq_cmd_t interrupt_commands[OHCI_NEEDED_IRQ_COMMANDS];
    6775} hc_t;
    6876
  • uspace/drv/ohci/ohci.c

    rd0c060b r3b543d5  
    202202
    203203        /* It does no harm if we register this on polling */
    204         ret = register_interrupt_handler(device, irq, irq_handler, NULL);
     204        ret = register_interrupt_handler(device, irq, irq_handler,
     205            &instance->hc.interrupt_code);
    205206        CHECK_RET_FINI_RETURN(ret,
    206207            "Failed(%d) to register interrupt handler.\n", ret);
  • uspace/drv/ohci/ohci.ma

    rd0c060b r3b543d5  
    1110 pci/ven=106b&dev=003f
    2210 pci/ven=10de&dev=0aa5
    3 10 pci/ven=10de&dev=0aa5
     3
     410 pci/ven=1002&dev=4374
     510 pci/ven=1002&dev=4375
     6
     710 pci/ven=1002&dev=4387
     810 pci/ven=1002&dev=4388
     910 pci/ven=1002&dev=4389
     1010 pci/ven=1002&dev=438a
     1110 pci/ven=1002&dev=438b
  • uspace/drv/ohci/ohci_regs.h

    rd0c060b r3b543d5  
    7272#define CS_SOC_SHIFT (16)
    7373
     74        /** Interupt enable/disable/status,
     75         * reads give the same value,
     76         * writing causes enable/disable,
     77         * status is write-clean (writing 1 clears the bit*/
    7478        volatile uint32_t interrupt_status;
    75 #define IS_SO   (1 << 0)  /* Scheduling overrun */
    76 #define IS_WDH  (1 << 1)  /* Write-back done head */
    77 #define IS_SF   (1 << 2)  /* Start of frame */
    78 #define IS_RD   (1 << 3)  /* Resume detected */
    79 #define IS_UE   (1 << 4)  /* Unrecoverable error */
    80 #define IS_FNO  (1 << 5)  /* Frame number overflow */
    81 #define IS_RHSC (1 << 6)  /* Root hub status change */
    82 #define IS_OC   (1 << 30) /* Ownership change */
    83 
    84         /** Interupt enable/disable, reads give the same value, writing causes
    85          * enable/disable */
    8679        volatile uint32_t interrupt_enable;
    8780        volatile uint32_t interrupt_disable;
  • uspace/drv/ohci/pci.c

    rd0c060b r3b543d5  
    4646
    4747#include "pci.h"
    48 
    49 #define PAGE_SIZE_MASK 0xfffff000
    50 
    51 #define HCC_PARAMS_OFFSET 0x8
    52 #define HCC_PARAMS_EECP_MASK 0xff
    53 #define HCC_PARAMS_EECP_OFFSET 8
    54 
    55 #define CMD_OFFSET 0x0
    56 #define CONFIGFLAG_OFFSET 0x40
    57 
    58 #define USBCMD_RUN 1
    59 
    60 #define USBLEGSUP_OFFSET 0
    61 #define USBLEGSUP_BIOS_CONTROL (1 << 16)
    62 #define USBLEGSUP_OS_CONTROL (1 << 24)
    63 #define USBLEGCTLSTS_OFFSET 4
    64 
    65 #define DEFAULT_WAIT 10000
    66 #define WAIT_STEP 10
    6748
    6849/** Get address of registers and IRQ for given device.
     
    146127int pci_enable_interrupts(ddf_dev_t *device)
    147128{
    148         return ENOTSUP;
    149129        int parent_phone =
    150130            devman_parent_device_connect(device->handle, IPC_FLAG_BLOCKING);
  • uspace/lib/usb/src/host/batch.c

    rd0c060b r3b543d5  
    128128        memcpy(instance->buffer, instance->data_buffer, instance->buffer_size);
    129129
    130         usb_log_debug("Batch %p done (T%d.%d, %s %s in, %zuB): %s (%d).\n",
     130        usb_log_debug("Batch(%p) done (T%d.%d, %s %s in, %zuB): %s (%d).\n",
    131131            instance, instance->ep->address, instance->ep->endpoint,
    132132            usb_str_speed(instance->ep->speed),
    133133            usb_str_transfer_type_short(instance->ep->transfer_type),
    134             instance->transfered_size, str_error(instance->error), instance->error);
     134            instance->transfered_size, str_error(instance->error),
     135            instance->error);
    135136
    136137        instance->callback_in(instance->fun, instance->error,
     
    147148        assert(instance->callback_out);
    148149
    149         usb_log_debug("Batch %p done (T%d.%d, %s %s out): %s (%d).\n",
     150        usb_log_debug("Batch(%p) done (T%d.%d, %s %s out): %s (%d).\n",
    150151            instance, instance->ep->address, instance->ep->endpoint,
    151152            usb_str_speed(instance->ep->speed),
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