Changes in / [d0c060b:3b543d5] in mainline

Files:

• kernel/generic/include/ddi/irq.h (modified) (2 diffs)
• kernel/generic/src/ipc/irq.c (modified) (4 diffs)
• uspace/drv/ehci-hcd/ehci-hcd.ma (modified) (1 diff)
• uspace/drv/ehci-hcd/pci.c (modified) (1 diff)
• uspace/drv/ohci/hc.c (modified) (6 diffs)
• uspace/drv/ohci/hc.h (modified) (2 diffs)
• uspace/drv/ohci/ohci.c (modified) (1 diff)
• uspace/drv/ohci/ohci.ma (modified) (1 diff)
• uspace/drv/ohci/ohci_regs.h (modified) (1 diff)
• uspace/drv/ohci/pci.c (modified) (2 diffs)
• uspace/lib/usb/src/host/batch.c (modified) (2 diffs)

kernel/generic/include/ddi/irq.h

@@ -77 +77 @@
          */
         CMD_PIO_WRITE_A_32,
-        
+
+        /** Read 1 byte from the memory space. */
+        CMD_MEM_READ_8,
+        /** Read 2 bytes from the memory space. */
+        CMD_MEM_READ_16,
+        /** Read 4 bytes from the memory space. */
+        CMD_MEM_READ_32,
+
+        /** Write 1 byte to the memory space. */
+        CMD_MEM_WRITE_8,
+        /** Write 2 bytes to the memory space. */
+        CMD_MEM_WRITE_16,
+        /** Write 4 bytes to the memory space. */
+        CMD_MEM_WRITE_32,
+
+        /** Write 1 byte from the source argument to the memory space. */
+        CMD_MEM_WRITE_A_8,
+        /** Write 2 bytes from the source argument to the memory space. */
+        CMD_MEM_WRITE_A_16,
+        /** Write 4 bytes from the source argument to the memory space. */
+        CMD_MEM_WRITE_A_32,
+
         /**
          * Perform a bit masking on the source argument
@@ -203 +224 @@
         /** Notification configuration structure. */
         ipc_notif_cfg_t notif_cfg; 
+
+        as_t *driver_as;
 } irq_t;
 

kernel/generic/src/ipc/irq.c

@@ -174 +174 @@
         irq->notif_cfg.code = code;
         irq->notif_cfg.counter = 0;
+        irq->driver_as = AS;
         
         /*
@@ -364 +365 @@
                 return IRQ_DECLINE;
         
+#define CMD_MEM_READ(target) \
+do { \
+        void *va = code->cmds[i].addr; \
+        if (AS != irq->driver_as) \
+                as_switch(AS, irq->driver_as); \
+        printf("Copying data from address: %p.\n", va); \
+        memcpy_from_uspace(&target, va, (sizeof(target))); \
+        if (dstarg) \
+                scratch[dstarg] = target; \
+} while(0)
+
+#define CMD_MEM_WRITE(val) \
+do { \
+        void *va = code->cmds[i].addr; \
+        if (AS != irq->driver_as) \
+                as_switch(AS, irq->driver_as); \
+        printf("Writing data to address: %p.\n", va); \
+        memcpy_to_uspace(va, &val, sizeof(val)); \
+} while (0)
+
+        as_t *current_as = AS;
         size_t i;
         for (i = 0; i < code->cmdcount; i++) {
@@ -422 +444 @@
                         }
                         break;
+                case CMD_MEM_READ_8: {
+                        uint8_t val;
+                        CMD_MEM_READ(val);
+                        break;
+                        }
+                case CMD_MEM_READ_16: {
+                        uint16_t val;
+                        CMD_MEM_READ(val);
+                        break;
+                        }
+                case CMD_MEM_READ_32: {
+                        uint32_t val;
+                        CMD_MEM_READ(val);
+                        printf("mem READ value: %x.\n", val);
+                        break;
+                        }
+                case CMD_MEM_WRITE_8: {
+                        uint8_t val = code->cmds[i].value;
+                        CMD_MEM_WRITE(val);
+                        break;
+                        }
+                case CMD_MEM_WRITE_16: {
+                        uint16_t val = code->cmds[i].value;
+                        CMD_MEM_WRITE(val);
+                        break;
+                        }
+                case CMD_MEM_WRITE_32: {
+                        uint32_t val = code->cmds[i].value;
+                        CMD_MEM_WRITE(val);
+                        break;
+                        }
+                case CMD_MEM_WRITE_A_8:
+                        if (srcarg) {
+                                uint8_t val = scratch[srcarg];
+                                CMD_MEM_WRITE(val);
+                        }
+                        break;
+                case CMD_MEM_WRITE_A_16:
+                        if (srcarg) {
+                                uint16_t val = scratch[srcarg];
+                                CMD_MEM_WRITE(val);
+                        }
+                        break;
+                case CMD_MEM_WRITE_A_32:
+                        if (srcarg) {
+                                uint32_t val = scratch[srcarg];
+                                CMD_MEM_WRITE(val);
+                        }
+                        break;
                 case CMD_BTEST:
                         if ((srcarg) && (dstarg)) {
@@ -435 +506 @@
                         break;
                 case CMD_ACCEPT:
+                        if (AS != current_as)
+                                as_switch(AS, current_as);
                         return IRQ_ACCEPT;
                 case CMD_DECLINE:
                 default:
+                        if (AS != current_as)
+                                as_switch(AS, current_as);
                         return IRQ_DECLINE;
                 }
         }
+        if (AS != current_as)
+                as_switch(AS, current_as);
         
         return IRQ_DECLINE;

uspace/drv/ehci-hcd/ehci-hcd.ma

@@ -2 +2 @@
 10 pci/ven=1002&dev=4386
 10 pci/ven=1002&dev=4396
+10 pci/ven=1002&dev=4373
 10 pci/ven=1022&dev=7463
 10 pci/ven=1022&dev=7808

uspace/drv/ehci-hcd/pci.c

@@ -186 +186 @@
         CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) to read PCI config space.\n",
             ret);
-        usb_log_info("Register space BAR at %p:%" PRIxn ".\n", (void *) address, value);
+        usb_log_info("Register space BAR at %p:%" PRIxn ".\n",
+            (void *) address, value);
 
         /* clear lower byte, it's not part of the BASE address */

uspace/drv/ohci/hc.c

@@ -45 +45 @@
 #include "hcd_endpoint.h"
 
+#define OHCI_USED_INTERRUPTS \
+    (I_SO | I_WDH | I_UE | I_RHSC)
 static int interrupt_emulator(hc_t *instance);
 static void hc_gain_control(hc_t *instance);
@@ -285 +287 @@
 {
         assert(instance);
-        if ((status & ~IS_SF) == 0) /* ignore sof status */
+        usb_log_debug("OHCI interrupt: %x.\n", status);
+        if ((status & ~I_SF) == 0) /* ignore sof status */
                 return;
-        if (status & IS_RHSC)
+        if (status & I_RHSC)
                 rh_interrupt(&instance->rh);
 
-        usb_log_debug("OHCI interrupt: %x.\n", status);
-
-        if (status & IS_WDH) {
+
+        if (status & I_WDH) {
                 fibril_mutex_lock(&instance->guard);
                 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
@@ -332 +334 @@
 {
         assert(instance);
+        usb_log_debug("Requesting OHCI control.\n");
         /* Turn off legacy emulation */
         volatile uint32_t *ohci_emulation_reg =
@@ -337 +340 @@
         usb_log_debug("OHCI legacy register %p: %x.\n",
                 ohci_emulation_reg, *ohci_emulation_reg);
-        *ohci_emulation_reg = 0;
+        *ohci_emulation_reg &= ~0x1;
 
         /* Interrupt routing enabled => smm driver is active */
@@ -421 +424 @@
             instance->registers->control);
 
-        /* Disable interrupts */
-        instance->registers->interrupt_disable = I_SF | I_OC;
-        usb_log_debug2("Disabling interrupts: %x.\n",
-            instance->registers->interrupt_disable);
-        instance->registers->interrupt_disable = I_MI;
+        /* Enable interrupts */
+        instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
         usb_log_debug2("Enabled interrupts: %x.\n",
             instance->registers->interrupt_enable);
+        instance->registers->interrupt_enable = I_MI;
 
         /* Set periodic start to 90% */
@@ -492 +493 @@
             instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
 
+        /* Init interrupt code */
+        instance->interrupt_code.cmds = instance->interrupt_commands;
+        {
+                /* Read status register */
+                instance->interrupt_commands[0].cmd = CMD_MEM_READ_32;
+                instance->interrupt_commands[0].dstarg = 1;
+                instance->interrupt_commands[0].addr =
+                    (void*)&instance->registers->interrupt_status;
+
+                /* Test whether we are the interrupt cause */
+                instance->interrupt_commands[1].cmd = CMD_BTEST;
+                instance->interrupt_commands[1].value =
+                    OHCI_USED_INTERRUPTS;
+                instance->interrupt_commands[1].srcarg = 1;
+                instance->interrupt_commands[1].dstarg = 2;
+
+                /* Predicate cleaning and accepting */
+                instance->interrupt_commands[2].cmd = CMD_PREDICATE;
+                instance->interrupt_commands[2].value = 2;
+                instance->interrupt_commands[2].srcarg = 2;
+
+                /* Write clean status register */
+                instance->interrupt_commands[3].cmd = CMD_MEM_WRITE_A_32;
+                instance->interrupt_commands[3].srcarg = 1;
+                instance->interrupt_commands[3].addr =
+                    (void*)&instance->registers->interrupt_status;
+
+                /* Accept interrupt */
+                instance->interrupt_commands[4].cmd = CMD_ACCEPT;
+
+                instance->interrupt_code.cmdcount = OHCI_NEEDED_IRQ_COMMANDS;
+        }
+
         return EOK;
 }

uspace/drv/ohci/hc.h

@@ -51 +51 @@
 #include "hw_struct/hcca.h"
 
+#define OHCI_NEEDED_IRQ_COMMANDS 5
+
 typedef struct hc {
         ohci_regs_t *registers;
@@ -65 +67 @@
         fid_t interrupt_emulator;
         fibril_mutex_t guard;
+
+        /** Code to be executed in kernel interrupt handler */
+        irq_code_t interrupt_code;
+
+        /** Commands that form interrupt code */
+        irq_cmd_t interrupt_commands[OHCI_NEEDED_IRQ_COMMANDS];
 } hc_t;
 

uspace/drv/ohci/ohci.c

@@ -202 +202 @@
 
         /* It does no harm if we register this on polling */
-        ret = register_interrupt_handler(device, irq, irq_handler, NULL);
+        ret = register_interrupt_handler(device, irq, irq_handler,
+            &instance->hc.interrupt_code);
         CHECK_RET_FINI_RETURN(ret,
             "Failed(%d) to register interrupt handler.\n", ret);

uspace/drv/ohci/ohci.ma

@@ -1 +1 @@
 10 pci/ven=106b&dev=003f
 10 pci/ven=10de&dev=0aa5
-10 pci/ven=10de&dev=0aa5
+
+10 pci/ven=1002&dev=4374
+10 pci/ven=1002&dev=4375
+
+10 pci/ven=1002&dev=4387
+10 pci/ven=1002&dev=4388
+10 pci/ven=1002&dev=4389
+10 pci/ven=1002&dev=438a
+10 pci/ven=1002&dev=438b

uspace/drv/ohci/ohci_regs.h

@@ -72 +72 @@
 #define CS_SOC_SHIFT (16)
 
+        /** Interupt enable/disable/status,
+         * reads give the same value,
+         * writing causes enable/disable,
+         * status is write-clean (writing 1 clears the bit*/
         volatile uint32_t interrupt_status;
-#define IS_SO   (1 << 0)  /* Scheduling overrun */
-#define IS_WDH  (1 << 1)  /* Write-back done head */
-#define IS_SF   (1 << 2)  /* Start of frame */
-#define IS_RD   (1 << 3)  /* Resume detected */
-#define IS_UE   (1 << 4)  /* Unrecoverable error */
-#define IS_FNO  (1 << 5)  /* Frame number overflow */
-#define IS_RHSC (1 << 6)  /* Root hub status change */
-#define IS_OC   (1 << 30) /* Ownership change */
-
-        /** Interupt enable/disable, reads give the same value, writing causes
-         * enable/disable */
         volatile uint32_t interrupt_enable;
         volatile uint32_t interrupt_disable;

uspace/drv/ohci/pci.c

@@ -46 +46 @@
 
 #include "pci.h"
-
-#define PAGE_SIZE_MASK 0xfffff000
-
-#define HCC_PARAMS_OFFSET 0x8
-#define HCC_PARAMS_EECP_MASK 0xff
-#define HCC_PARAMS_EECP_OFFSET 8
-
-#define CMD_OFFSET 0x0
-#define CONFIGFLAG_OFFSET 0x40
-
-#define USBCMD_RUN 1
-
-#define USBLEGSUP_OFFSET 0
-#define USBLEGSUP_BIOS_CONTROL (1 << 16)
-#define USBLEGSUP_OS_CONTROL (1 << 24)
-#define USBLEGCTLSTS_OFFSET 4
-
-#define DEFAULT_WAIT 10000
-#define WAIT_STEP 10
 
 /** Get address of registers and IRQ for given device.
@@ -146 +127 @@
 int pci_enable_interrupts(ddf_dev_t *device)
 {
-        return ENOTSUP;
         int parent_phone =
             devman_parent_device_connect(device->handle, IPC_FLAG_BLOCKING);

uspace/lib/usb/src/host/batch.c

@@ -128 +128 @@
         memcpy(instance->buffer, instance->data_buffer, instance->buffer_size);
 
-        usb_log_debug("Batch %p done (T%d.%d, %s %s in, %zuB): %s (%d).\n",
+        usb_log_debug("Batch(%p) done (T%d.%d, %s %s in, %zuB): %s (%d).\n",
             instance, instance->ep->address, instance->ep->endpoint,
             usb_str_speed(instance->ep->speed),
             usb_str_transfer_type_short(instance->ep->transfer_type),
-            instance->transfered_size, str_error(instance->error), instance->error);
+            instance->transfered_size, str_error(instance->error),
+            instance->error);
 
         instance->callback_in(instance->fun, instance->error,
@@ -147 +148 @@
         assert(instance->callback_out);
 
-        usb_log_debug("Batch %p done (T%d.%d, %s %s out): %s (%d).\n",
+        usb_log_debug("Batch(%p) done (T%d.%d, %s %s out): %s (%d).\n",
             instance, instance->ep->address, instance->ep->endpoint,
             usb_str_speed(instance->ep->speed),