Changeset 3b712407 in mainline for arch/mips32/src/exception.c

Timestamp:

2006-03-23T21:15:59Z (19 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e1be3b6

Parents:

38ee55b

Message:

Fixed bad rflags masking in amd64.
Added TLS get address instruction emulation for mips.

File:

• arch/mips32/src/exception.c (modified) (2 diffs)

arch/mips32/src/exception.c

@@ -84 +84 @@
 }
 
+static void reserved_instr_exception(int n, istate_t *istate)
+{
+        if (*((__u32 *)istate->epc) == 0x7c03e83b) {
+                ASSERT(THREAD);
+                istate->epc += 4;
+                istate->v1 = istate->k1;
+        } else {
+                print_regdump(istate);
+                panic("reserved instruction");
+        }
+}
+
 static void breakpoint_exception(int n, istate_t *istate)
 {
@@ -143 +155 @@
                 exc_register(i, "undef", (iroutine) unhandled_exception);
         exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
+        exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
         exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
         exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);