Ignore:
File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/abs32le/include/asm.h

    r7a0359b r3d6beaa  
    3838#include <typedefs.h>
    3939#include <config.h>
    40 #include <trace.h>
    4140
    42 NO_TRACE static inline void asm_delay_loop(uint32_t usec)
     41static inline void asm_delay_loop(uint32_t usec)
    4342{
    4443}
    4544
    46 NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void)
     45static inline __attribute__((noreturn)) void cpu_halt(void)
    4746{
    4847        /* On real hardware this should stop processing further
    … …  
    5453}
    5554
    56 NO_TRACE static inline void cpu_sleep(void)
     55static inline void cpu_sleep(void)
    5756{
    5857        /* On real hardware this should put the CPU into low-power
    … …  
    6261}
    6362
    64 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
     63static inline void pio_write_8(ioport8_t *port, uint8_t val)
    6564{
    6665}
    … …  
    7473 *
    7574 */
    76 NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
     75static inline void pio_write_16(ioport16_t *port, uint16_t val)
    7776{
    7877}
    … …  
    8685 *
    8786 */
    88 NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
     87static inline void pio_write_32(ioport32_t *port, uint32_t val)
    8988{
    9089}
    … …  
    9897 *
    9998 */
    100 NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
     99static inline uint8_t pio_read_8(ioport8_t *port)
    101100{
    102101        return 0;
    … …  
    111110 *
    112111 */
    113 NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
     112static inline uint16_t pio_read_16(ioport16_t *port)
    114113{
    115114        return 0;
    … …  
    124123 *
    125124 */
    126 NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
     125static inline uint32_t pio_read_32(ioport32_t *port)
    127126{
    128127        return 0;
    129128}
    130129
    131 NO_TRACE static inline ipl_t interrupts_enable(void)
     130static inline ipl_t interrupts_enable(void)
    132131{
    133         /*
    134          * On real hardware this unconditionally enables preemption
    135          * by internal and external interrupts.
    136          *
    137          * The return value stores the previous interrupt level.
    138          */
     132        /* On real hardware this unconditionally enables preemption
     133           by internal and external interrupts.
     134           
     135           The return value stores the previous interrupt level. */
    139136       
    140137        return 0;
    141138}
    142139
    143 NO_TRACE static inline ipl_t interrupts_disable(void)
     140static inline ipl_t interrupts_disable(void)
    144141{
    145         /*
    146          * On real hardware this disables preemption by the usual
    147          * set of internal and external interrupts. This does not
    148          * apply to special non-maskable interrupts and sychronous
    149          * CPU exceptions.
    150          *
    151          * The return value stores the previous interrupt level.
    152          */
     142        /* On real hardware this disables preemption by the usual
     143           set of internal and external interrupts. This does not
     144           apply to special non-maskable interrupts and sychronous
     145           CPU exceptions.
     146           
     147           The return value stores the previous interrupt level. */
    153148       
    154149        return 0;
    155150}
    156151
    157 NO_TRACE static inline void interrupts_restore(ipl_t ipl)
     152static inline void interrupts_restore(ipl_t ipl)
    158153{
    159         /*
    160          * On real hardware this either enables or disables preemption
    161          * according to the interrupt level value from the argument.
    162          */
     154        /* On real hardware this either enables or disables preemption
     155           according to the interrupt level value from the argument. */
    163156}
    164157
    165 NO_TRACE static inline ipl_t interrupts_read(void)
     158static inline ipl_t interrupts_read(void)
    166159{
    167         /*
    168          * On real hardware the return value stores the current interrupt
    169          * level.
    170          */
     160        /* On real hardware the return value stores the current interrupt
     161           level. */
    171162       
    172163        return 0;
    173164}
    174165
    175 NO_TRACE static inline bool interrupts_disabled(void)
     166static inline bool interrupts_disabled(void)
    176167{
    177         /*
    178          * On real hardware the return value is true iff interrupts are
    179          * disabled.
    180          */
    181        
     168        /* On real hardware the return value is true iff interrupts are
     169           disabled. */
    182170        return false;
    183171}
    184172
    185 NO_TRACE static inline uintptr_t get_stack_base(void)
     173static inline uintptr_t get_stack_base(void)
    186174{
    187         /*
    188          * On real hardware this returns the address of the bottom
    189          * of the current CPU stack. The the_t structure is stored
    190          * on the bottom of stack and this is used to identify the
    191          * current CPU, current task, current thread and current
    192          * address space.
    193          */
     175        /* On real hardware this returns the address of the bottom
     176           of the current CPU stack. The the_t structure is stored
     177           on the bottom of stack and this is used to identify the
     178           current CPU, current task, current thread and current
     179           address space. */
    194180       
    195181        return 0;
Note: See TracChangeset for help on using the changeset viewer.