Changeset 3d9d948 in mainline
- Timestamp:
- 2010-07-27T20:13:05Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 1720cf9
- Parents:
- a9b5b5f
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c
ra9b5b5f r3d9d948 51 51 #define S3C24XX_UTRSTAT_RDATA 0x1 52 52 53 #define S3C24XX_UFSTAT_TX_FULL 0x4000 54 #define S3C24XX_UFSTAT_RX_FULL 0x0040 55 #define S3C24XX_UFSTAT_RX_COUNT 0x002f 56 53 57 static void s3c24xx_uart_sendb(outdev_t *dev, uint8_t byte) 54 58 { … … 56 60 (s3c24xx_uart_t *) dev->data; 57 61 58 /* Wait for transmitter to be empty. */59 while ((pio_read_32(&uart->io->u trstat) & S3C24XX_UTRSTAT_TX_EMPTY) == 0)62 /* Wait for space becoming available in Tx FIFO. */ 63 while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_TX_FULL) != 0) 60 64 ; 61 65 … … 85 89 s3c24xx_uart_t *uart = irq->instance; 86 90 87 if ((pio_read_32(&uart->io->utrstat) & S3C24XX_UTRSTAT_RDATA) != 0) {91 while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) { 88 92 uint32_t data = pio_read_32(&uart->io->urxh); 93 pio_read_32(&uart->io->uerstat); 89 94 indev_push_character(uart->indev, data & 0xff); 90 95 } … … 123 128 uart->irq.instance = uart; 124 129 125 /* Disable FIFO */ 126 pio_write_32(&uart->io->ufcon, 127 pio_read_32(&uart->io->ufcon) & ~0x01); 130 /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */ 131 pio_write_32(&uart->io->ufcon, 0x01); 128 132 129 133 /* Set RX interrupt to pulse mode */ -
uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c
ra9b5b5f r3d9d948 57 57 #define S3C24XX_UTRSTAT_TX_EMPTY 0x4 58 58 #define S3C24XX_UTRSTAT_RDATA 0x1 59 60 /* Bits in UFSTAT register */ 61 #define S3C24XX_UFSTAT_TX_FULL 0x4000 62 #define S3C24XX_UFSTAT_RX_FULL 0x0040 63 #define S3C24XX_UFSTAT_RX_COUNT 0x002f 59 64 60 65 static irq_cmd_t uart_irq_cmds[] = { … … 155 160 (void) iid; (void) call; 156 161 157 if ((pio_read_32(&uart->io->utrstat) & S3C24XX_UTRSTAT_RDATA) != 0) {162 while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) { 158 163 uint32_t data = pio_read_32(&uart->io->urxh) & 0xff; 164 pio_read_32(&uart->io->uerstat); 159 165 160 166 if (uart->client_phone != -1) { … … 206 212 static void s3c24xx_uart_sendb(s3c24xx_uart_t *uart, uint8_t byte) 207 213 { 208 /* Wait for transmitter to be empty. */209 while ((pio_read_32(&uart->io->u trstat) & S3C24XX_UTRSTAT_TX_EMPTY) == 0)214 /* Wait for space becoming available in Tx FIFO. */ 215 while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_TX_FULL) != 0) 210 216 ; 211 217
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