Changes in kernel/arch/mips32/src/exception.c [e16e0d59:41a7f62] in mainline
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kernel/arch/mips32/src/exception.c
re16e0d59 r41a7f62 27 27 */ 28 28 29 /** @addtogroup mips32 29 /** @addtogroup mips32 30 30 * @{ 31 31 */ … … 38 38 #include <panic.h> 39 39 #include <arch/cp0.h> 40 #include < arch/types.h>40 #include <typedefs.h> 41 41 #include <arch.h> 42 42 #include <debug.h> … … 49 49 #include <symtab.h> 50 50 51 static c har *exctable[] = {51 static const char *exctable[] = { 52 52 "Interrupt", 53 53 "TLB Modified", … … 67 67 "Floating Point", 68 68 NULL, NULL, NULL, NULL, NULL, NULL, NULL, 69 "WatchHi/WatchLo", /* 23 */69 "WatchHi/WatchLo", /* 23 */ 70 70 NULL, NULL, NULL, NULL, NULL, NULL, NULL, 71 71 "Virtual Coherency - data", 72 72 }; 73 73 74 static void print_regdump(istate_t *istate) 75 { 76 char *pcsymbol, *rasymbol; 77 78 pcsymbol = symtab_fmt_name_lookup(istate->epc); 79 rasymbol = symtab_fmt_name_lookup(istate->ra); 80 81 printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, 82 istate->ra, rasymbol, istate->sp); 83 } 84 85 static void unhandled_exception(int n, istate_t *istate) 74 void istate_decode(istate_t *istate) 75 { 76 printf("epc=%p\tsta=%#010" PRIx32 "\t" 77 "lo =%#010" PRIx32 "\thi =%#010" PRIx32 "\n", 78 (void *) istate->epc, istate->status, 79 istate->lo, istate->hi); 80 81 printf("a0 =%#010" PRIx32 "\ta1 =%#010" PRIx32 "\t" 82 "a2 =%#010" PRIx32 "\ta3 =%#010" PRIx32 "\n", 83 istate->a0, istate->a1, istate->a2, istate->a3); 84 85 printf("t0 =%#010" PRIx32 "\tt1 =%#010" PRIx32 "\t" 86 "t2 =%#010" PRIx32 "\tt3 =%#010" PRIx32 "\n", 87 istate->t0, istate->t1, istate->t2, istate->t3); 88 89 printf("t4 =%#010" PRIx32 "\tt5 =%#010" PRIx32 "\t" 90 "t6 =%#010" PRIx32 "\tt7 =%#010" PRIx32 "\n", 91 istate->t4, istate->t5, istate->t6, istate->t7); 92 93 printf("t8 =%#010" PRIx32 "\tt9 =%#010" PRIx32 "\t" 94 "v0 =%#010" PRIx32 "\tv1 =%#010" PRIx32 "\n", 95 istate->t8, istate->t9, istate->v0, istate->v1); 96 97 printf("s0 =%#010" PRIx32 "\ts1 =%#010" PRIx32 "\t" 98 "s2 =%#010" PRIx32 "\ts3 =%#010" PRIx32 "\n", 99 istate->s0, istate->s1, istate->s2, istate->s3); 100 101 printf("s4 =%#010" PRIx32 "\ts5 =%#010" PRIx32 "\t" 102 "s6 =%#010" PRIx32 "\ts7 =%#010" PRIx32 "\n", 103 istate->s4, istate->s5, istate->s6, istate->s7); 104 105 printf("s8 =%#010" PRIx32 "\tat =%#010" PRIx32 "\t" 106 "kt0=%#010" PRIx32 "\tkt1=%#010" PRIx32 "\n", 107 istate->s8, istate->at, istate->kt0, istate->kt1); 108 109 printf("sp =%p\tra =%p\tgp =%p\n", 110 (void *) istate->sp, (void *) istate->ra, 111 (void *) istate->gp); 112 } 113 114 static void unhandled_exception(unsigned int n, istate_t *istate) 86 115 { 87 116 fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]); 88 89 print_regdump(istate); 90 panic("Unhandled exception %s.", exctable[n]); 91 } 92 93 static void reserved_instr_exception(int n, istate_t *istate) 94 { 95 if (*((uint32_t *)istate->epc) == 0x7c03e83b) { 117 panic_badtrap(istate, n, "Unhandled exception %s.", exctable[n]); 118 } 119 120 static void reserved_instr_exception(unsigned int n, istate_t *istate) 121 { 122 if (*((uint32_t *) istate->epc) == 0x7c03e83b) { 96 123 ASSERT(THREAD); 97 124 istate->epc += 4; 98 istate->v1 = istate->k 1;99 } else 125 istate->v1 = istate->kt1; 126 } else 100 127 unhandled_exception(n, istate); 101 128 } 102 129 103 static void breakpoint_exception( int n, istate_t *istate)130 static void breakpoint_exception(unsigned int n, istate_t *istate) 104 131 { 105 132 #ifdef CONFIG_DEBUG … … 113 140 } 114 141 115 static void tlbmod_exception( int n, istate_t *istate)142 static void tlbmod_exception(unsigned int n, istate_t *istate) 116 143 { 117 144 tlb_modified(istate); 118 145 } 119 146 120 static void tlbinv_exception( int n, istate_t *istate)147 static void tlbinv_exception(unsigned int n, istate_t *istate) 121 148 { 122 149 tlb_invalid(istate); … … 124 151 125 152 #ifdef CONFIG_FPU_LAZY 126 static void cpuns_exception( int n, istate_t *istate)153 static void cpuns_exception(unsigned int n, istate_t *istate) 127 154 { 128 155 if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) 129 156 scheduler_fpu_lazy_request(); 130 157 else { 131 fault_if_from_uspace(istate, "Unhandled Coprocessor Unusable Exception."); 132 panic("Unhandled Coprocessor Unusable Exception."); 158 fault_if_from_uspace(istate, 159 "Unhandled Coprocessor Unusable Exception."); 160 panic_badtrap(istate, n, 161 "Unhandled Coprocessor Unusable Exception."); 133 162 } 134 163 } 135 164 #endif 136 165 137 static void interrupt_exception(int n, istate_t *istate) 138 { 139 uint32_t cause; 140 int i; 141 142 /* decode interrupt number and process the interrupt */ 143 cause = (cp0_cause_read() >> 8) & 0xff; 144 166 static void interrupt_exception(unsigned int n, istate_t *istate) 167 { 168 /* Decode interrupt number and process the interrupt */ 169 uint32_t cause = (cp0_cause_read() >> 8) & 0xff; 170 171 unsigned int i; 145 172 for (i = 0; i < 8; i++) { 146 173 if (cause & (1 << i)) { … … 151 178 */ 152 179 irq->handler(irq); 153 spinlock_unlock(&irq->lock);180 irq_spinlock_unlock(&irq->lock, false); 154 181 } else { 155 182 /* … … 157 184 */ 158 185 #ifdef CONFIG_DEBUG 159 printf("cpu%u: spurious interrupt (inum=% d)\n",186 printf("cpu%u: spurious interrupt (inum=%u)\n", 160 187 CPU->id, i); 161 188 #endif … … 166 193 167 194 /** Handle syscall userspace call */ 168 static void syscall_exception( int n, istate_t *istate)169 { 170 panic("Syscall is handled through shortcut.");195 static void syscall_exception(unsigned int n, istate_t *istate) 196 { 197 fault_if_from_uspace(istate, "Syscall is handled through shortcut."); 171 198 } 172 199 173 200 void exception_init(void) 174 201 { 175 int i;176 202 unsigned int i; 203 177 204 /* Clear exception table */ 178 205 for (i = 0; i < IVT_ITEMS; i++) 179 exc_register(i, "undef", (iroutine) unhandled_exception); 180 181 exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception); 182 exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception); 183 exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception); 184 exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception); 185 exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception); 186 exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception); 206 exc_register(i, "undef", false, 207 (iroutine_t) unhandled_exception); 208 209 exc_register(EXC_Bp, "bkpoint", true, 210 (iroutine_t) breakpoint_exception); 211 exc_register(EXC_RI, "resinstr", true, 212 (iroutine_t) reserved_instr_exception); 213 exc_register(EXC_Mod, "tlb_mod", true, 214 (iroutine_t) tlbmod_exception); 215 exc_register(EXC_TLBL, "tlbinvl", true, 216 (iroutine_t) tlbinv_exception); 217 exc_register(EXC_TLBS, "tlbinvl", true, 218 (iroutine_t) tlbinv_exception); 219 exc_register(EXC_Int, "interrupt", true, 220 (iroutine_t) interrupt_exception); 221 187 222 #ifdef CONFIG_FPU_LAZY 188 exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception); 189 #endif 190 exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception); 223 exc_register(EXC_CpU, "cpunus", true, 224 (iroutine_t) cpuns_exception); 225 #endif 226 227 exc_register(EXC_Sys, "syscall", true, 228 (iroutine_t) syscall_exception); 191 229 } 192 230
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