Changeset 434f700 in mainline

Timestamp:

2005-04-26T16:17:41Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

babcb148

Parents:

dba84ff

Message:

Replace the deadlock-prone TLB shootdown algorithm with a deadlock-free implementation.
The implementation is a variant of the CMU TLB consistency algorithm.
Very inefficient implementation of a very inefficient (but correct) algorithm.

Files:

• arch/ia32/src/bios/bios.c (modified) (1 diff)
• arch/ia32/src/interrupt.c (modified) (1 diff)
• arch/ia32/src/smp/apic.c (modified) (2 diffs)
• include/cpu.h (modified) (1 diff)
• src/Makefile.config (modified) (1 diff)
• src/cpu/cpu.c (modified) (1 diff)
• src/mm/tlb.c (modified) (4 diffs)
• src/mm/vm.c (modified) (1 diff)

arch/ia32/src/bios/bios.c

@@ -34 +34 @@
 void bios_init(void)
 {
-        /* Copy the EBDA out from BIOS Data Area */
+        /* Copy the EBDA address out from BIOS Data Area */
         ebda = *((__u16 *) BIOS_EBDA_PTR) * 0x10;
 }

arch/ia32/src/interrupt.c

@@ -93 +93 @@
 {
         printf("cpu%d: syscall\n", CPU->id);
-        thread_usleep(1000000);
+        thread_usleep(1000);
 }
 

arch/ia32/src/smp/apic.c

@@ -231 +231 @@
         l_apic[TPR] &= TPRClear;
 
-//      if (CPU->arch.family >= 6)
-//              enable_l_apic_in_msr();
+        if (CPU->arch.family >= 6)
+                enable_l_apic_in_msr();
         
         tmp = l_apic[ICRlo] & ICRloClear;
@@ -257 +257 @@
         
         l_apic[ICRT] = t1-t2;
+        
 }
 

include/cpu.h

@@ -61 +61 @@
         int id;
         int active;
+        int tlb_active;
 
         __u16 frequency_mhz;

src/Makefile.config

@@ -23 +23 @@
 #TEST_DIR=synch/rwlock2/
 #TEST_DIR=synch/rwlock3/
-#TEST_DIR=synch/rwlock4/
-TEST_DIR=synch/rwlock5/
+TEST_DIR=synch/rwlock4/
+#TEST_DIR=synch/rwlock5/
 #TEST_DIR=synch/semaphore1/
 #TEST_DIR=synch/semaphore2/

src/cpu/cpu.c

@@ -83 +83 @@
         
         CPU->active = 1;
+        CPU->tlb_active = 1;
         
         cpu_identify();

src/mm/tlb.c

@@ -34 +34 @@
 #include <arch/interrupt.h>
 #include <config.h>
+#include <arch.h>
 
 #ifdef __SMP__
 static spinlock_t tlblock;
-static volatile int tlb_shootdown_cnt;
 
 void tlb_init(void)
 {
         spinlock_initialize(&tlblock);
-        tlb_shootdown_cnt = 0;
 }
 
@@ -48 +47 @@
 void tlb_shootdown_start(void)
 {
+        int i;
+
+        CPU->tlb_active = 0;
         spinlock_lock(&tlblock);
         tlb_shootdown_ipi_send();
+        tlb_invalidate(0); /* TODO: use valid ASID */
         
-        while (tlb_shootdown_cnt < config.cpu_active - 1)
-                ;
-                
-        tlb_shootdown_cnt = 0;
+busy_wait:      
+        for (i = 0; i<config.cpu_active; i++)
+                if (cpus[i].tlb_active)
+                        goto busy_wait;
 }
 
@@ -60 +63 @@
 {
         spinlock_unlock(&tlblock);
+        CPU->tlb_active = 1;
 }
 
@@ -69 +73 @@
 void tlb_shootdown_ipi_recv(void)
 {
-        atomic_inc((int *) &tlb_shootdown_cnt);
+        CPU->tlb_active = 0;
         spinlock_lock(&tlblock);
         spinlock_unlock(&tlblock);
         tlb_invalidate(0);      /* TODO: use valid ASID */
+        CPU->tlb_active = 1;
 }
 #endif /* __SMP__ */

src/mm/vm.c

@@ -180 +180 @@
         spinlock_unlock(&m->lock);
 
-        tlb_invalidate(0);
         tlb_shootdown_finalize();