Changeset 457d18a in mainline for arch/ia64/include/mm/page.h


Ignore:
Timestamp:
2006-01-28T16:47:39Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d0780b4c
Parents:
849386a
Message:

ia64 virtual address translation subsystem update.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • arch/ia64/include/mm/page.h

    r849386a r457d18a  
    3333#include <arch/mm/frame.h>
    3434#include <genarch/mm/page_ht.h>
     35#include <arch/mm/asid.h>
    3536#include <arch/types.h>
    3637#include <typedefs.h>
     
    4748
    4849/** Implementation of page hash table interface. */
    49 #define HT_ENTRIES_ARCH                 (VHPT_SIZE/sizeof(pte_t))
    50 #define HT_HASH_ARCH(page, asid)        vhpt_hash((page), (asid))
    51 #define HT_COMPARE_ARCH(page, asid, t)  0
    52 #define HT_SLOT_EMPTY_ARCH(t)           1
    53 #define HT_INVALIDATE_SLOT_ARCH(t)
    54 #define HT_GET_NEXT_ARCH(t)             0
    55 #define HT_SET_NEXT_ARCH(t, s)
    56 #define HT_SET_RECORD_ARCH(t, page, asid, frame, flags)
     50#define HT_ENTRIES_ARCH                                 (VHPT_SIZE/sizeof(pte_t))
     51#define HT_HASH_ARCH(page, asid)                        vhpt_hash((page), (asid))
     52#define HT_COMPARE_ARCH(page, asid, t)                  vhpt_compare((page), (asid), (t))
     53#define HT_SLOT_EMPTY_ARCH(t)                           ((t)->present.tag.tag_info.ti)
     54#define HT_INVALIDATE_SLOT_ARCH(t)                      (t)->present.tag.tag_info.ti = true
     55#define HT_GET_NEXT_ARCH(t)                             (t)->present.next
     56#define HT_SET_NEXT_ARCH(t, s)                          (t)->present.next = (s)
     57#define HT_SET_RECORD_ARCH(t, page, asid, frame, flags) vhpt_set_record(t, page, asid, frame, flags)
     58
     59#define PPN_SHIFT                       12
    5760
    5861#define VRN_SHIFT                       61
     
    6063
    6164#define VRN_KERNEL                      0
    62 #define VRN_WORK                        1LL
    6365#define REGION_REGISTERS                8
    6466
     
    6769
    6870#define VHPT_BASE                       page_ht         /* Must be aligned to VHPT_SIZE */
     71
     72/** Memory Attributes. */
     73#define MA_WRITEBACK    0x0
     74#define MA_UNCACHEABLE  0x4
     75
     76/** Privilege Levels. Only the most and the least privileged ones are ever used. */
     77#define PL_KERNEL       0x0
     78#define PL_USER         0x3
     79
     80/* Access Rigths. Only certain combinations are used by the kernel. */
     81#define AR_READ         0x0
     82#define AR_EXECUTE      0x1
     83#define AR_WRITE        0x2
    6984
    7085struct vhpt_tag_info {
     
    102117       
    103118        /* Word 3 */                                                                                                   
    104         unsigned long long next : 64;   /**< Collision chain next pointer. */
     119        pte_t *next;                    /**< Collision chain next pointer. */
    105120} __attribute__ ((packed));
    106121
     
    120135       
    121136        /* Word 3 */                                                                                                   
    122         unsigned long long next : 64;   /**< Collision chain next pointer. */
     137        pte_t *next;                    /**< Collision chain next pointer. */
    123138       
    124139} __attribute__ ((packed));
     
    127142        struct vhpt_entry_present present;
    128143        struct vhpt_entry_not_present not_present;
     144        __u64 word[4];
    129145} vhpt_entry;
    130146
     
    244260extern void page_arch_init(void);
    245261extern pte_t *vhpt_hash(__address page, asid_t asid);
     262extern bool vhpt_compare(__address page, asid_t asid, pte_t *t);
     263extern void vhpt_set_record(pte_t *t, __address page, asid_t asid, __address frame, int flags);
    246264
    247265#endif
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