Changes in kernel/arch/ia32/src/cpu/cpu.c [57c2a87:45b4300] in mainline
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kernel/arch/ia32/src/cpu/cpu.c
r57c2a87 r45b4300 72 72 void fpu_disable(void) 73 73 { 74 write_cr0(read_cr0() & ~CR0_TS); 74 asm volatile ( 75 "mov %%cr0, %%eax\n" 76 "or $8, %%eax\n" 77 "mov %%eax, %%cr0\n" 78 ::: "%eax" 79 ); 75 80 } 76 81 77 82 void fpu_enable(void) 78 83 { 79 write_cr0(read_cr0() | CR0_TS); 84 asm volatile ( 85 "mov %%cr0, %%eax\n" 86 "and $0xffFFffF7, %%eax\n" 87 "mov %%eax,%%cr0\n" 88 ::: "%eax" 89 ); 80 90 } 81 91 … … 105 115 "mov %[help], %%cr4\n" 106 116 : [help] "+r" (help) 107 : [mask] "i" (CR4_OSFXSR | CR4_OSXMMEXCPT)117 : [mask] "i" (CR4_OSFXSR_MASK | CR4_OSXMMEXCPT_MASK) 108 118 ); 109 119 } … … 150 160 void cpu_print_report(cpu_t* cpu) 151 161 { 152 printf("cpu%u: (%s family=%u model=%u stepping=%u apicid=%u) %" PRIu16153 " MHz\n",cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family,154 cpu->arch.model, cpu->arch.stepping, cpu-> arch.id, cpu->frequency_mhz);162 printf("cpu%u: (%s family=%u model=%u stepping=%u) %" PRIu16 " MHz\n", 163 cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family, 164 cpu->arch.model, cpu->arch.stepping, cpu->frequency_mhz); 155 165 } 156 166
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