Changes in kernel/arch/ia32/src/fpu_context.c [add04f7:45b4300] in mainline
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kernel/arch/ia32/src/fpu_context.c
radd04f7 r45b4300 27 27 */ 28 28 29 /** @addtogroup ia32 29 /** @addtogroup ia32 30 30 * @{ 31 31 */ … … 38 38 #include <cpu.h> 39 39 40 /** x87 FPU scr values (P3+ MMX2) */ 41 enum { 42 X87_FLUSH_ZERO_FLAG = (1 << 15), 43 X87_ROUND_CONTROL_MASK = (0x3 << 13), 44 x87_ROUND_TO_NEAREST_EVEN = (0x0 << 13), 45 X87_ROUND_DOWN_TO_NEG_INF = (0x1 << 13), 46 X87_ROUND_UP_TO_POS_INF = (0x2 << 13), 47 X87_ROUND_TO_ZERO = (0x3 << 13), 48 X87_PRECISION_MASK = (1 << 12), 49 X87_UNDERFLOW_MASK = (1 << 11), 50 X87_OVERFLOW_MASK = (1 << 10), 51 X87_ZERO_DIV_MASK = (1 << 9), 52 X87_DENORMAL_OP_MASK = (1 << 8), 53 X87_INVALID_OP_MASK = (1 << 7), 54 X87_DENOM_ZERO_FLAG = (1 << 6), 55 X87_PRECISION_EXC_FLAG = (1 << 5), 56 X87_UNDERFLOW_EXC_FLAG = (1 << 4), 57 X87_OVERFLOW_EXC_FLAG = (1 << 3), 58 X87_ZERO_DIV_EXC_FLAG = (1 << 2), 59 X87_DENORMAL_EXC_FLAG = (1 << 1), 60 X87_INVALID_OP_EXC_FLAG = (1 << 0), 61 62 X87_ALL_MASK = X87_PRECISION_MASK | X87_UNDERFLOW_MASK | X87_OVERFLOW_MASK | X87_ZERO_DIV_MASK | X87_DENORMAL_OP_MASK | X87_INVALID_OP_MASK, 63 }; 64 40 65 typedef void (*fpu_context_function)(fpu_context_t *fctx); 41 66 42 static fpu_context_function fpu_save, fpu_restore; 67 static fpu_context_function fpu_save; 68 static fpu_context_function fpu_restore; 43 69 44 70 static void fpu_context_f_save(fpu_context_t *fctx) … … 77 103 void fpu_fxsr(void) 78 104 { 79 fpu_save =fpu_context_fx_save;80 fpu_restore =fpu_context_fx_restore;105 fpu_save = fpu_context_fx_save; 106 fpu_restore = fpu_context_fx_restore; 81 107 } 82 108 … … 98 124 } 99 125 126 /** Initialize x87 FPU. Mask all exceptions. */ 100 127 void fpu_init() 101 128 { … … 111 138 "ldmxcsr %[help0]\n" 112 139 : [help0] "+m" (help0), [help1] "+r" (help1) 113 : [magic] "i" ( 0x1f80)140 : [magic] "i" (X87_ALL_MASK) 114 141 ); 115 142 }
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