Changeset 45f4f19 in mainline

Timestamp:

2012-03-05T20:33:48Z (13 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1b90e90

Parents:

d1ca752

Message:

ohci: Use different macros for register and memory access.

Location:

uspace/drv/bus/usb/ohci/hw_struct

Files:

• endpoint_descriptor.c (modified) (3 diffs)
• endpoint_descriptor.h (modified) (11 diffs)
• mem_access.h (added)
• transfer_descriptor.c (modified) (2 diffs)
• transfer_descriptor.h (modified) (4 diffs)

uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c ¶

@@ -58 +58 @@
                 /* Mark as dead, used for dummy EDs at the beginning of
                  * endpoint lists. */
-                OHCI_WR(instance->status, ED_STATUS_K_FLAG);
+                OHCI_MEM32_WR(instance->status, ED_STATUS_K_FLAG);
                 return;
         }
@@ -65 +65 @@
 
         /* Status: address, endpoint nr, direction mask and max packet size. */
-        OHCI_WR(instance->status,
+        OHCI_MEM32_WR(instance->status,
             ((ep->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT)
             | ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT)
@@ -74 +74 @@
         /* Low speed flag */
         if (ep->speed == USB_SPEED_LOW)
-                OHCI_SET(instance->status, ED_STATUS_S_FLAG);
+                OHCI_MEM32_SET(instance->status, ED_STATUS_S_FLAG);
 
         /* Isochronous format flag */
         if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS)
-                OHCI_SET(instance->status, ED_STATUS_F_FLAG);
+                OHCI_MEM32_SET(instance->status, ED_STATUS_F_FLAG);
 
         /* Set TD to the list */
         const uintptr_t pa = addr_to_phys(td);
-        OHCI_WR(instance->td_head, pa & ED_TDHEAD_PTR_MASK);
-        OHCI_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK);
+        OHCI_MEM32_WR(instance->td_head, pa & ED_TDHEAD_PTR_MASK);
+        OHCI_MEM32_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK);
 
         /* Set toggle bit */
         if (ep->toggle)
-                OHCI_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);
+                OHCI_MEM32_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);
 
 }

uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.h ¶

@@ -40 +40 @@
 #include <usb/host/endpoint.h>
 
-#include "../ohci_regs.h"
 #include "../utils/malloc32.h"
 #include "transfer_descriptor.h"
 
 #include "completion_codes.h"
+#include "mem_access.h"
 
 /**
@@ -117 +117 @@
 {
         assert(instance);
-        return (OHCI_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG)
-            || (OHCI_RD(instance->status) & ED_STATUS_K_FLAG);
+        return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG)
+            || (OHCI_MEM32_RD(instance->status) & ED_STATUS_K_FLAG);
 }
 
@@ -124 +124 @@
 {
         assert(instance);
-        OHCI_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG);
+        OHCI_MEM32_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG);
 }
 
@@ -135 +135 @@
 {
         assert(instance);
-        return (OHCI_RD(instance->td_head) & ED_TDHEAD_PTR_MASK)
-            != (OHCI_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK);
+        return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_PTR_MASK)
+            != (OHCI_MEM32_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK);
 }
 
@@ -148 +148 @@
         assert(instance);
         const uintptr_t pa = addr_to_phys(td);
-        OHCI_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK);
+        OHCI_MEM32_WR(instance->td_tail, pa & ED_TDTAIL_PTR_MASK);
 }
 
@@ -154 +154 @@
 {
         assert(instance);
-        return OHCI_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK;
+        return OHCI_MEM32_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK;
 }
 
@@ -160 +160 @@
 {
         assert(instance);
-        return OHCI_RD(instance->td_head) & ED_TDHEAD_PTR_MASK;
+        return OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_PTR_MASK;
 }
 
@@ -174 +174 @@
         const uint32_t pa = addr_to_phys(next);
         assert((pa & ED_NEXT_PTR_MASK) << ED_NEXT_PTR_SHIFT == pa);
-        OHCI_WR(instance->next, pa);
+        OHCI_MEM32_WR(instance->next, pa);
 }
 
@@ -180 +180 @@
 {
         assert(instance);
-        return OHCI_RD(instance->next) & ED_NEXT_PTR_MASK;
+        return OHCI_MEM32_RD(instance->next) & ED_NEXT_PTR_MASK;
 }
 
@@ -191 +191 @@
 {
         assert(instance);
-        return (OHCI_RD(instance->td_head) & ED_TDHEAD_TOGGLE_CARRY) ? 1 : 0;
+        return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_TOGGLE_CARRY) ? 1 : 0;
 }
 
@@ -203 +203 @@
         assert(instance);
         if (toggle) {
-                OHCI_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);
+                OHCI_MEM32_SET(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);
         } else {
                 /* Clear halted flag when reseting toggle TODO: Why? */
-                OHCI_CLR(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);
-                OHCI_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG);
+                OHCI_MEM32_CLR(instance->td_head, ED_TDHEAD_TOGGLE_CARRY);
+                OHCI_MEM32_CLR(instance->td_head, ED_TDHEAD_HALTED_FLAG);
         }
 }

uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c ¶

@@ -60 +60 @@
         bzero(instance, sizeof(td_t));
         /* Set PID and Error code */
-        OHCI_WR(instance->status,
+        OHCI_MEM32_WR(instance->status,
             ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT)
             | ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT));
@@ -66 +66 @@
         if (toggle == 0 || toggle == 1) {
                 /* Set explicit toggle bit */
-                OHCI_SET(instance->status, TD_STATUS_T_USE_TD_FLAG);
-                OHCI_SET(instance->status, toggle ? TD_STATUS_T_FLAG : 0);
+                OHCI_MEM32_SET(instance->status, TD_STATUS_T_USE_TD_FLAG);
+                OHCI_MEM32_SET(instance->status, toggle ? TD_STATUS_T_FLAG : 0);
         }
 
         /* Alow less data on input. */
         if (dir == USB_DIRECTION_IN) {
-                OHCI_SET(instance->status, TD_STATUS_ROUND_FLAG);
+                OHCI_MEM32_SET(instance->status, TD_STATUS_ROUND_FLAG);
         }
 
         if (buffer != NULL) {
                 assert(size != 0);
-                OHCI_WR(instance->cbp, addr_to_phys(buffer));
-                OHCI_WR(instance->be, addr_to_phys(buffer + size - 1));
+                OHCI_MEM32_WR(instance->cbp, addr_to_phys(buffer));
+                OHCI_MEM32_WR(instance->be, addr_to_phys(buffer + size - 1));
         }
 
-        OHCI_WR(instance->next, addr_to_phys(next) & TD_NEXT_PTR_MASK);
+        OHCI_MEM32_WR(instance->next, addr_to_phys(next) & TD_NEXT_PTR_MASK);
 
 }

uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h ¶

@@ -38 +38 @@
 #include <stdint.h>
 
-#include "../ohci_regs.h"
+#include "mem_access.h"
 #include "completion_codes.h"
 
@@ -100 +100 @@
 {
         assert(instance);
-        const int cc =(OHCI_RD(instance->status)
+        const int cc =(OHCI_MEM32_RD(instance->status)
             >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;
         /* This value is changed on transfer completion,
@@ -119 +119 @@
 {
         assert(instance);
-        const int cc = (OHCI_RD(instance->status)
+        const int cc = (OHCI_MEM32_RD(instance->status)
             >> TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;
         return cc_to_rc(cc);
@@ -136 +136 @@
                 return 0;
         /* Buffer end points to the last byte of transfer buffer, so add 1 */
-        return OHCI_RD(instance->be) - OHCI_RD(instance->cbp) + 1;
+        return OHCI_MEM32_RD(instance->be) - OHCI_MEM32_RD(instance->cbp) + 1;
 }
 #endif