Changeset 481c520 in mainline
- Timestamp:
- 2006-02-27T12:30:11Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 02f441c0
- Parents:
- 4a2b52f
- Location:
- arch
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/src/drivers/i8042.c
r4a2b52f r481c520 46 46 */ 47 47 48 #define i8042_DATA 0x6049 #define i8042_STATUS 0x6448 #define i8042_DATA 0x60 49 #define i8042_STATUS 0x64 50 50 #define i8042_BUFFER_FULL_MASK 0x01 51 52 51 53 52 /** Keyboard commands. */ … … 57 56 58 57 /* 59 60 Write 8042 Command Byte: next data byte written to port 60h is 60 placed in 8042 command register.Format: 61 62 |7|6|5|4|3|2|1|0|8042 Command Byte 63 | | | | | | | `---- 1=enable output register full interrupt 64 | | | | | | `----- should be 0 65 | | | | | `------ 1=set status register system, 0=clear 66 | | | | `------- 1=override keyboard inhibit, 0=allow inhibit 67 | | | `-------- disable keyboard I/O by driving clock line low 68 | | `--------- disable auxiliary device, drives clock line low 69 | `---------- IBM scancode translation 0=AT, 1=PC/XT 70 `----------- reserved, should be 0 71 */ 72 73 #define i8042_SET_COMMAND 0x60 74 #define i8042_COMMAND 0x49 75 #define i8042_WAIT_MASK 0x02 76 58 * 60 Write 8042 Command Byte: next data byte written to port 60h is 59 * placed in 8042 command register.Format: 60 * 61 * |7|6|5|4|3|2|1|0|8042 Command Byte 62 * | | | | | | | `---- 1=enable output register full interrupt 63 * | | | | | | `----- should be 0 64 * | | | | | `------ 1=set status register system, 0=clear 65 * | | | | `------- 1=override keyboard inhibit, 0=allow inhibit 66 * | | | `-------- disable keyboard I/O by driving clock line low 67 * | | `--------- disable auxiliary device, drives clock line low 68 * | `---------- IBM scancode translation 0=AT, 1=PC/XT 69 * `----------- reserved, should be 0 70 */ 71 72 #define i8042_SET_COMMAND 0x60 73 #define i8042_COMMAND 0x49 74 #define i8042_WAIT_MASK 0x02 77 75 78 76 #define SPECIAL '?' … … 88 86 89 87 #define ACTIVE_READ_BUFF_SIZE 16 /*Must be power of 2*/ 90 91 88 92 89 __u8 active_read_buff[ACTIVE_READ_BUFF_SIZE]={0}; … … 272 269 { 273 270 exc_register(VECTOR_KBD, "i8042_interrupt", i8042_interrupt); 274 while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ 271 while (inb(i8042_STATUS)&i8042_WAIT_MASK) { 272 /* wait */ 273 } 275 274 outb(i8042_STATUS,i8042_SET_COMMAND); 276 while (inb(i8042_STATUS)&i8042_WAIT_MASK); /*Wait*/ 275 while (inb(i8042_STATUS)&i8042_WAIT_MASK) { 276 /* wait */ 277 } 277 278 outb(i8042_DATA,i8042_COMMAND); 278 279 … … 406 407 } 407 408 408 409 409 static __u8 active_read_buff_read(void) 410 410 { … … 428 428 429 429 430 static void active_read ed_key_pressed(__u8 sc)430 static void active_read_key_pressed(__u8 sc) 431 431 { 432 432 char *map = sc_primary_map; … … 497 497 } 498 498 499 500 499 static char key_read(chardev_t *d) 501 500 { 502 501 char ch; 503 504 502 505 503 while(!(ch=active_read_buff_read())) … … 511 509 key_released(x ^ KEY_RELEASE); 512 510 else 513 active_read ed_key_pressed(x);511 active_read_key_pressed(x); 514 512 } 515 513 return ch; 516 514 } 517 518 -
arch/ia64/src/ski/ski.c
r4a2b52f r481c520 87 87 88 88 /** 89 This is blocking wrap function of ski_getchar 90 It active waits ... for using with non-stable kernel91 */89 * This is a blocking wrapper for ski_getchar(). 90 * To be used when the kernel crashes. 91 */ 92 92 static char ski_getchar_blocking(chardev_t *d) 93 93 { 94 volatile int ch; 95 while(!(ch=ski_getchar())); 96 if(ch == '\r') ch = '\n'; 94 int ch; 95 96 while(!(ch=ski_getchar())) 97 ; 98 if(ch == '\r') 99 ch = '\n'; 97 100 return (char) ch; 98 101 } 99 100 102 101 103 /** Ask keyboard if a key was pressed. */ -
arch/ia64/src/start.S
r4a2b52f r481c520 27 27 # 28 28 29 30 29 #include <arch/register.h> 31 30 #include <arch/mm/page.h> … … 33 32 #include <mm/asid.h> 34 33 35 36 34 #define RR_MASK (0xFFFFFFFF00000002) 37 35 #define RID_SHIFT 8 38 36 #define PS_SHIFT 2 39 37 40 41 38 #define KERNEL_TRANSLATION_I 0x0010000000000661 42 39 #define KERNEL_TRANSLATION_D 0x0010000000000661 43 44 40 45 41 .section K_TEXT_START … … 51 47 .auto 52 48 53 # Fill TR.i and TR.d using Region Register #VRN_KERNEL49 # Fill TR.i and TR.d using Region Register #VRN_KERNEL 54 50 55 51 movl r8=(VRN_KERNEL<<VRN_SHIFT) … … 61 57 mov rr[r8]=r9 62 58 63 64 59 movl r8=(VRN_KERNEL<<VRN_SHIFT) 65 60 mov cr.ifa=r8 … … 68 63 movl r10=(KERNEL_TRANSLATION_I) 69 64 itr.i itr[r0]=r10 70 71 65 movl r10=(KERNEL_TRANSLATION_D) 72 66 itr.d dtr[r0]=r10 73 74 67 75 68 # initialize PSR … … 77 70 srlz.i 78 71 srlz.d 79 movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /* Enable paging*/72 movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /* Enable paging */ 80 73 mov r9=psr 81 74 or r10=r10,r9 … … 86 79 srlz.d 87 80 srlz.i 88 .explicit89 81 90 /*Return from interupt is only the way how to fill upper half word of PSR*/ 91 {rfi;;} 82 .explicit 83 /* 84 * Return From Interupt is the only the way to fill upper half word of PSR. 85 */ 86 rfi;; 92 87 {nop 0;;} 93 88 {nop 0;;} … … 100 95 101 96 .global paging_start 102 /*Now we are paging*/103 97 paging_start: 98 99 /* 100 * Now we are paging. 101 */ 102 104 103 {nop 0;;} 105 104 {nop 0;;} … … 111 110 {nop 0;;} 112 111 113 .auto114 115 112 # switch to register bank 1 116 113 bsw.1 … … 118 115 # initialize register stack 119 116 mov ar.rsc = r0 120 movl r8=(VRN_KERNEL<<VRN_SHIFT) 117 movl r8=(VRN_KERNEL<<VRN_SHIFT) ;; 121 118 mov ar.bspstore = r8 122 119 loadrs 123 120 124 .explicit125 121 # initialize memory stack to some sane value 126 122 movl r12 = stack0;; … … 131 127 movl r1 = _hardcoded_load_address ;; 132 128 133 134 135 # 136 # Initialize hardcoded_* variables. 137 # 129 /* 130 * Initialize hardcoded_* variables. 131 */ 138 132 movl r14 = _hardcoded_ktext_size 139 133 movl r15 = _hardcoded_kdata_size … … 147 141 st8 [r19] = r16 148 142 149 150 .auto 151 152 movl r18=main_bsp 153 mov b1=r18 143 movl r18=main_bsp ;; 144 mov b1=r18 ;; 154 145 br.call.sptk.many b0=b1 155 156 146 157 147 0: -
arch/sparc64/include/console.h
r4a2b52f r481c520 30 30 #define __sparc64_CONSOLE_H__ 31 31 32 extern void fb_sparc64_console_init(void); 32 extern void kofwinput(void *arg); 33 extern void ofw_sparc64_console_init(void); 34 extern void standalone_sparc64_console_init(void); 33 35 34 36 #endif -
arch/sparc64/src/console.c
r4a2b52f r481c520 32 32 #include <genarch/fb/fb.h> 33 33 #include <arch/drivers/fb.h> 34 #include <genarch/ofw/ofw.h> 35 #include <console/chardev.h> 36 #include <console/console.h> 37 #include <arch/asm.h> 38 #include <arch/register.h> 39 #include <proc/thread.h> 40 #include <synch/mutex.h> 34 41 35 void fb_sparc64_console_init(void) 42 static void ofw_sparc64_putchar(chardev_t *d, const char ch); 43 static char ofw_sparc64_getchar(chardev_t *d); 44 static void ofw_sparc64_suspend(chardev_t *d); 45 static void ofw_sparc64_resume(chardev_t *d); 46 47 mutex_t canwork; 48 49 static volatile int ofw_console_active; 50 51 static chardev_t ofw_sparc64_console; 52 static chardev_operations_t ofw_sparc64_console_ops = { 53 .write = ofw_sparc64_putchar, 54 .read = ofw_sparc64_getchar, 55 .resume = ofw_sparc64_resume, 56 .suspend = ofw_sparc64_suspend 57 }; 58 59 /** Initialize kernel console to use OpenFirmware services. */ 60 void ofw_sparc64_console_init(void) 36 61 { 62 chardev_initialize("ofw_sparc64_console", &ofw_sparc64_console, &ofw_sparc64_console_ops); 63 stdin = &ofw_sparc64_console; 64 stdout = &ofw_sparc64_console; 65 mutex_initialize(&canwork); 66 ofw_console_active = 1; 67 } 68 69 /** Initialize kernel console to use framebuffer and keyboard directly. */ 70 void standalone_sparc64_console_init(void) 71 { 72 ofw_console_active = 0; 73 stdin = NULL; 37 74 fb_init(FB_VIRT_ADDRESS, FB_X_RES, FB_Y_RES, FB_COLOR_DEPTH/8); 38 75 } 76 77 /** Write one character using OpenFirmware. 78 * 79 * @param d Character device (ignored). 80 * @param ch Character to be written. 81 */ 82 void ofw_sparc64_putchar(chardev_t *d, const char ch) 83 { 84 pstate_reg_t pstate; 85 86 /* 87 * 32-bit OpenFirmware depends on PSTATE.AM bit set. 88 */ 89 pstate.value = pstate_read(); 90 pstate.am = true; 91 pstate_write(pstate.value); 92 93 if (ch == '\n') 94 ofw_putchar('\r'); 95 ofw_putchar(ch); 96 97 pstate.am = false; 98 pstate_write(pstate.value); 99 } 100 101 /** Read one character using OpenFirmware. 102 * 103 * The call is non-blocking. 104 * 105 * @param d Character device (ignored). 106 * @return Character read or zero if no character was read. 107 */ 108 char ofw_sparc64_getchar(chardev_t *d) 109 { 110 char ch; 111 pstate_reg_t pstate; 112 113 /* 114 * 32-bit OpenFirmware depends on PSTATE.AM bit set. 115 */ 116 pstate.value = pstate_read(); 117 pstate.am = true; 118 pstate_write(pstate.value); 119 120 ch = ofw_getchar(); 121 122 pstate.am = false; 123 pstate_write(pstate.value); 124 125 return ch; 126 } 127 128 void ofw_sparc64_suspend(chardev_t *d) 129 { 130 mutex_lock(&canwork); 131 } 132 133 void ofw_sparc64_resume(chardev_t *d) 134 { 135 mutex_unlock(&canwork); 136 } 137 138 /** Kernel thread for pushing characters read from OFW to input buffer. 139 * 140 * @param arg Ignored. 141 */ 142 void kofwinput(void *arg) 143 { 144 145 while (ofw_console_active) { 146 char ch = 0; 147 148 mutex_lock(&canwork); 149 mutex_unlock(&canwork); 150 151 ch = ofw_sparc64_getchar(NULL); 152 if (ch) { 153 if (ch == '\r') 154 ch = '\n'; 155 chardev_push_character(&ofw_sparc64_console, ch); 156 } 157 thread_usleep(25000); 158 } 159 } -
arch/sparc64/src/sparc64.c
r4a2b52f r481c520 37 37 { 38 38 interrupts_disable(); 39 ofw_sparc64_console_init(); 39 40 trap_init(); 40 41 tick_init(); … … 43 44 void arch_post_mm_init(void) 44 45 { 45 fb_sparc64_console_init();46 standalone_sparc64_console_init(); 46 47 } 47 48 … … 52 53 void arch_post_smp_init(void) 53 54 { 55 thread_t *t; 56 57 /* 58 * Create thread that reads characters from OFW's input. 59 */ 60 t = thread_create(kofwinput, NULL, TASK, 0); 61 if (!t) 62 panic("cannot create kofwinput\n"); 63 thread_ready(t); 54 64 } 55 65
Note:
See TracChangeset
for help on using the changeset viewer.