Changeset 49a39c2 in mainline
- Timestamp:
- 2006-02-06T21:14:29Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8a1da55
- Parents:
- 7febdde5
- Files:
-
- 1 deleted
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/include/context.h
r7febdde5 r49a39c2 59 59 } __attribute__ ((packed)); 60 60 61 /** This is passed to interrupt handlers */ 62 struct interrupt_context { 63 __u64 rax; 64 __u64 rbx; 65 __u64 rcx; 66 __u64 rdx; 67 __u64 rsi; 68 __u64 rdi; 69 __u64 r8; 70 __u64 r9; 71 __u64 r10; 72 __u64 r11; 73 __u64 r12; 74 __u64 r13; 75 __u64 r14; 76 __u64 r15; 77 /* These 2 items MUST be last parts of the structure */ 78 __u64 rbp; 79 __u64 stack[0]; /* Additional data on stack */ 80 } __attribute__ ((packed)); 81 61 82 #endif -
arch/amd64/include/context_offset.h
r7febdde5 r49a39c2 9 9 #define OFFSET_R15 0x38 10 10 #define OFFSET_IPL 0x40 11 12 #define IOFFSET_RAX 0x0 13 #define IOFFSET_RBX 0x8 14 #define IOFFSET_RCX 0x10 15 #define IOFFSET_RDX 0x18 16 #define IOFFSET_RSI 0x20 17 #define IOFFSET_RDI 0x28 18 #define IOFFSET_R8 0x30 19 #define IOFFSET_R9 0x38 20 #define IOFFSET_R10 0x40 21 #define IOFFSET_R11 0x48 22 #define IOFFSET_R12 0x50 23 #define IOFFSET_R13 0x58 24 #define IOFFSET_R14 0x60 25 #define IOFFSET_R15 0x68 26 #define IOFFSET_RBP 0x70 27 #define IREGISTER_SPACE 120 -
arch/amd64/include/cpu.h
r7febdde5 r49a39c2 51 51 }; 52 52 53 struct star_msr { 54 55 }; 56 57 struct lstar_msr { 58 59 }; 53 60 54 61 extern void set_efer_flag(int flag); -
arch/amd64/src/amd64.c
r7febdde5 r49a39c2 47 47 #include <interrupt.h> 48 48 49 /** Disable I/O on non-privileged levels 50 * 51 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register 52 */ 53 static void clean_IOPL_NT_flags(void) 54 { 55 asm 56 ( 57 "pushfq;" 58 "pop %%rax;" 59 "and $~(0x7000),%%rax;" 60 "pushq %%rax;" 61 "popfq;" 62 : 63 : 64 :"%rax" 65 ); 66 } 67 68 /** Disable alignment check 69 * 70 * Clean AM(18) flag in CR0 register 71 */ 72 static void clean_AM_flag(void) 73 { 74 asm 75 ( 76 "mov %%cr0,%%rax;" 77 "and $~(0x40000),%%rax;" 78 "mov %%rax,%%cr0;" 79 : 80 : 81 :"%rax" 82 ); 83 } 84 49 85 void arch_pre_mm_init(void) 50 86 { … … 64 100 /* Enable No-execute pages */ 65 101 set_efer_flag(AMD_NXE_FLAG); 102 /* Enable SYSCALL/SYSRET */ 103 set_efer_flag(AMD_SCE_FLAG); 66 104 /* Enable FPU */ 67 105 cpu_setup_fpu(); 106 /* Initialize segmentation */ 107 pm_init(); 68 108 69 pm_init(); 109 /* Disable I/O on nonprivileged levels 110 * clear the NT(nested-thread) flag 111 */ 112 clean_IOPL_NT_flags(); 113 /* Disable alignment check */ 114 clean_AM_flag(); 115 70 116 71 117 if (config.cpu_active == 1) { … … 74 120 i8254_init(); /* hard clock */ 75 121 76 exc_register(VECTOR_SYSCALL, "syscall", syscall);77 78 122 #ifdef CONFIG_SMP 79 123 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", -
arch/amd64/src/asm_utils.S
r7febdde5 r49a39c2 35 35 36 36 #include <arch/pm.h> 37 #include <arch/context_offset.h> 37 38 38 39 .text … … 104 105 105 106 # Push all general purpose registers on stack except %rbp, %rsp 106 .macro push_all_gpr 107 pushq %rax 108 pushq %rbx 109 pushq %rcx 110 pushq %rdx 111 pushq %rsi 112 pushq %rdi 113 pushq %r8 114 pushq %r9 115 pushq %r10 116 pushq %r11 117 pushq %r12 118 pushq %r13 119 pushq %r14 120 pushq %r15 107 .macro save_all_gpr 108 movq %rbp, IOFFSET_RBP(%rsp) 109 movq %rax, IOFFSET_RAX(%rsp) 110 movq %rbx, IOFFSET_RBX(%rsp) 111 movq %rcx, IOFFSET_RCX(%rsp) 112 movq %rdx, IOFFSET_RDX(%rsp) 113 movq %rsi, IOFFSET_RSI(%rsp) 114 movq %rdi, IOFFSET_RDI(%rsp) 115 movq %r8, IOFFSET_R8(%rsp) 116 movq %r9, IOFFSET_R9(%rsp) 117 movq %r10, IOFFSET_R10(%rsp) 118 movq %r11, IOFFSET_R11(%rsp) 119 movq %r12, IOFFSET_R12(%rsp) 120 movq %r13, IOFFSET_R13(%rsp) 121 movq %r14, IOFFSET_R14(%rsp) 122 movq %r15, IOFFSET_R15(%rsp) 121 123 .endm 122 124 123 .macro pop_all_gpr 124 popq %r15 125 popq %r14 126 popq %r13 127 popq %r12 128 popq %r11 129 popq %r10 130 popq %r9 131 popq %r8 132 popq %rdi 133 popq %rsi 134 popq %rdx 135 popq %rcx 136 popq %rbx 137 popq %rax 125 .macro restore_all_gpr 126 movq IOFFSET_RBP(%rsp), %rbp 127 movq IOFFSET_RAX(%rsp), %rax 128 movq IOFFSET_RBX(%rsp), %rbx 129 movq IOFFSET_RCX(%rsp), %rcx 130 movq IOFFSET_RDX(%rsp), %rdx 131 movq IOFFSET_RSI(%rsp), %rsi 132 movq IOFFSET_RDI(%rsp), %rdi 133 movq IOFFSET_R8(%rsp), %r8 134 movq IOFFSET_R9(%rsp), %r9 135 movq IOFFSET_R10(%rsp), %r10 136 movq IOFFSET_R11(%rsp), %r11 137 movq IOFFSET_R12(%rsp), %r12 138 movq IOFFSET_R13(%rsp), %r13 139 movq IOFFSET_R14(%rsp), %r14 140 movq IOFFSET_R15(%rsp), %r15 138 141 .endm 139 142 … … 147 150 # 148 151 .macro handler i n 149 pushq %rbp 150 movq %rsp,%rbp 151 152 push_all_gpr 152 subq $IREGISTER_SPACE, %rsp 153 save_all_gpr 153 154 154 155 movq $(\i),%rdi # %rdi - first parameter 155 movq %rbp, %rsi 156 addq $8, %rsi # %rsi - second parameter - original stack 156 movq %rsp, %rsi # %rsi - pointer to interrupt_context 157 157 call exc_dispatch # exc_dispatch(i, stack) 158 158 … … 169 169 170 170 # Return with error word 171 pop_all_gpr 172 173 popq %rbp; 174 addq $8,%rsp; # Skip error word 171 restore_all_gpr 172 # $8 = Skip error word 173 addq $IREGISTER_SPACE + 0x8, %rsp 175 174 iretq 176 175 177 176 0: 178 177 # Return with no error word 179 pop_all_gpr 180 181 popq %rbp 178 restore_all_gpr 179 addq $IREGISTER_SPACE, %rsp 182 180 iretq 183 181 -
arch/amd64/src/interrupt.c
r7febdde5 r49a39c2 59 59 } 60 60 */ 61 static void print_info_errcode(int n, void *st) 61 62 static void print_info_errcode(int n, struct interrupt_context *ctx) 62 63 { 63 64 char *symbol; 64 __ native *x = (__native *) st;65 __u64 *x = &ctx->stack[0]; 65 66 66 67 if (!(symbol=get_symtab_entry(x[1]))) … … 68 69 69 70 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); 70 printf("%%rip: %Q (%s)\n",x[1],symbol); 71 printf("ERROR_WORD=%Q\n", x[0]); 72 printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", x[2], x[3],read_cr0()); 73 printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",x[-2],x[-3],x[-4]); 74 printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",x[-5],x[-6],x[-7]); 75 printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",x[-8],x[-9],x[-10]); 76 printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",x[-11],x[-12],x[-13]); 77 printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",x[-14],x[-15],x); 78 printf("%%rbp=%Q\n",x[-1]); 71 printf("%%rip: %Q (%s)\n",ctx->stack[1],symbol); 72 printf("ERROR_WORD=%Q\n", ctx->stack[0]); 73 printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", ctx->stack[2], 74 ctx->stack[3],read_cr0()); 75 printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",ctx->rax,ctx->rbx,ctx->rcx); 76 printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",ctx->rdx,ctx->rsi,ctx->rdi); 77 printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",ctx->r8,ctx->r9,ctx->r10); 78 printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",ctx->r11,ctx->r12,ctx->r13); 79 printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",ctx->r14,ctx->r15,&ctx->stack[0]); 80 printf("%%rbp=%Q\n",ctx->rbp); 79 81 printf("stack: %Q, %Q, %Q\n", x[5], x[6], x[7]); 80 82 printf(" %Q, %Q, %Q\n", x[8], x[9], x[10]); 81 83 printf(" %Q, %Q, %Q\n", x[11], x[12], x[13]); 82 84 printf(" %Q, %Q, %Q\n", x[14], x[15], x[16]); 83 printf(" %Q, %Q, %Q\n", x[17], x[18], x[19]);84 printf(" %Q, %Q, %Q\n", x[20], x[21], x[22]);85 printf(" %Q, %Q, %Q\n", x[23], x[24], x[25]);86 85 // messy_stack_trace(&x[5]); 87 86 } … … 95 94 void (* eoi_function)(void) = NULL; 96 95 97 void null_interrupt(int n, void *st)96 void null_interrupt(int n, struct interrupt_context *ctx) 98 97 { 99 __native *stack = (__native *) st;100 101 98 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); \ 102 printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]); 99 printf("stack: %X, %X, %X, %X\n", ctx->stack[0], ctx->stack[1], 100 ctx->stack[2], ctx->stack[3]); 103 101 panic("unserviced interrupt\n"); 104 102 } … … 126 124 } 127 125 128 void page_fault(int n, void *stack)126 void page_fault(int n, struct interrupt_context *ctx) 129 127 { 130 128 __address page; … … 132 130 page = read_cr2(); 133 131 if (!as_page_fault(page)) { 134 print_info_errcode(n, stack);132 print_info_errcode(n,ctx); 135 133 printf("Page fault address: %Q\n", page); 136 134 panic("page fault\n"); 137 135 } 138 }139 140 void syscall(int n, void *stack)141 {142 printf("cpu%d: syscall\n", CPU->id);143 thread_usleep(1000);144 136 } 145 137 -
arch/amd64/src/mm/page.c
r7febdde5 r49a39c2 53 53 } 54 54 55 exc_register(14, "page_fault", page_fault);55 exc_register(14, "page_fault", (iroutine)page_fault); 56 56 write_cr3((__address) AS_KERNEL->page_table); 57 57 } -
arch/amd64/src/pm.c
r7febdde5 r49a39c2 1 1 /* 2 2 * Copyright (C) 2001-2004 Jakub Jermar 3 * Copyright (C) 2005-2006 Ondrej Palkovsky 3 4 * All rights reserved. 4 5 * … … 168 169 d->type = AR_INTERRUPT; /* masking interrupt */ 169 170 170 if (i == VECTOR_SYSCALL) {171 /*172 * The syscall interrupt gate must be calleable from userland.173 */174 d->dpl |= PL_USER;175 }176 177 171 idt_setoffset(d, ((__address) interrupt_handlers) + i*interrupt_handler_size); 178 exc_register(i, "undef", null_interrupt);172 exc_register(i, "undef", (iroutine)null_interrupt); 179 173 } 180 174 exc_register(13, "gp_fault", gp_fault); … … 183 177 } 184 178 185 186 /* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */ 187 static void clean_IOPL_NT_flags(void) 188 { 189 asm 190 ( 191 "pushfq;" 192 "pop %%rax;" 193 "and $~(0x7000),%%rax;" 194 "pushq %%rax;" 195 "popfq;" 196 : 197 : 198 :"%rax" 199 ); 200 } 201 202 /* Clean AM(18) flag in CR0 register */ 203 static void clean_AM_flag(void) 204 { 205 asm 206 ( 207 "mov %%cr0,%%rax;" 208 "and $~(0x40000),%%rax;" 209 "mov %%rax,%%cr0;" 210 : 211 : 212 :"%rax" 213 ); 214 } 215 179 /** Initialize segmentation - code/data/idt tables 180 * 181 */ 216 182 void pm_init(void) 217 183 { … … 255 221 */ 256 222 __asm__("ltr %0" : : "r" ((__u16) gdtselector(TSS_DES))); 257 258 clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ 259 clean_AM_flag(); /* Disable alignment check */ 260 } 223 } -
arch/mips32/src/exception.c
r7febdde5 r49a39c2 79 79 } 80 80 81 static void unhandled_exception(int n, void *data) 82 { 83 struct exception_regdump *pstate = (struct exception_regdump *)data; 84 81 static void unhandled_exception(int n, struct exception_regdump *pstate) 82 { 85 83 print_regdump(pstate); 86 84 panic("unhandled exception %s\n", exctable[n]); 87 85 } 88 86 89 static void breakpoint_exception(int n, void *data) 90 { 91 struct exception_regdump *pstate = (struct exception_regdump *)data; 92 87 static void breakpoint_exception(int n, struct exception_regdump *pstate) 88 { 93 89 #ifdef CONFIG_DEBUG 94 90 debugger_bpoint(pstate); … … 101 97 } 102 98 103 static void tlbmod_exception(int n, void *data) 104 { 105 struct exception_regdump *pstate = (struct exception_regdump *)data; 99 static void tlbmod_exception(int n, struct exception_regdump *pstate) 100 { 106 101 tlb_modified(pstate); 107 102 } 108 103 109 static void tlbinv_exception(int n, void *data) 110 { 111 struct exception_regdump *pstate = (struct exception_regdump *)data; 104 static void tlbinv_exception(int n, struct exception_regdump *pstate) 105 { 112 106 tlb_invalid(pstate); 113 107 } 114 108 115 109 #ifdef CONFIG_FPU_LAZY 116 static void cpuns_exception(int n, void *data)110 static void cpuns_exception(int n, struct exception_regdump *pstate) 117 111 { 118 112 if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) … … 123 117 #endif 124 118 125 static void interrupt_exception(int n, void*pstate)119 static void interrupt_exception(int n, struct exception_regdump *pstate) 126 120 { 127 121 __u32 cause; … … 138 132 #include <debug.h> 139 133 /** Handle syscall userspace call */ 140 static void syscall_exception(int n, void *data) 141 { 142 struct exception_regdump *pstate = (struct exception_regdump *)data; 143 134 static void syscall_exception(int n, struct exception_regdump *pstate) 135 { 144 136 if (pstate->a3 < SYSCALL_END) 145 137 pstate->v0 = syscall_table[pstate->a3](pstate->a0, … … 198 190 /* Clear exception table */ 199 191 for (i=0;i < IVT_ITEMS; i++) 200 exc_register(i, "undef", unhandled_exception);201 exc_register(EXC_Bp, "bkpoint", breakpoint_exception);202 exc_register(EXC_Mod, "tlb_mod", tlbmod_exception);203 exc_register(EXC_TLBL, "tlbinvl", tlbinv_exception);204 exc_register(EXC_TLBS, "tlbinvl", tlbinv_exception);205 exc_register(EXC_Int, "interrupt", interrupt_exception);192 exc_register(i, "undef", (iroutine) unhandled_exception); 193 exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception); 194 exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception); 195 exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception); 196 exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception); 197 exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception); 206 198 #ifdef CONFIG_FPU_LAZY 207 exc_register(EXC_CpU, "cpunus", cpuns_exception);199 exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception); 208 200 #endif 209 exc_register(EXC_Sys, "syscall", syscall_exception);210 } 201 exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception); 202 } -
generic/src/main/main.c
r7febdde5 r49a39c2 190 190 191 191 if (config.init_size > 0) 192 printf("config.init_addr=% X, config.init_size=%d\n", config.init_addr, config.init_size);192 printf("config.init_addr=%P, config.init_size=%d\n", config.init_addr, config.init_size); 193 193 194 194 /* -
tools/amd64/gencontext.c
r7febdde5 r49a39c2 17 17 struct context *pctx = &ctx; 18 18 19 struct interrupt_context ictx; 20 struct interrupt_context *ipctx = &ictx; 21 19 22 f = fopen(FILENAME,"w"); 20 23 if (!f) { … … 34 37 fprintf(f,"#define OFFSET_R15 0x%x\n",((int)&pctx->r15) - (int )pctx); 35 38 fprintf(f,"#define OFFSET_IPL 0x%x\n",((int)&pctx->ipl) - (int )pctx); 39 40 fprintf(f, "\n"); 41 42 #define ifpr(big,nm) fprintf(f, "#define IOFFSET_" #big " 0x%x\n", ((int)&ipctx->nm) - (int) ipctx) 43 44 ifpr(RAX, rax); 45 ifpr(RBX, rbx); 46 ifpr(RCX, rcx); 47 ifpr(RDX, rdx); 48 ifpr(RSI, rsi); 49 ifpr(RDI, rdi); 50 ifpr(R8, r8); 51 ifpr(R9, r9); 52 ifpr(R10, r10); 53 ifpr(R11, r11); 54 ifpr(R12, r12); 55 ifpr(R13, r13); 56 ifpr(R14, r14); 57 ifpr(R15, r15); 58 ifpr(RBP, rbp); 59 60 fprintf(f, "#define IREGISTER_SPACE %d\n", sizeof(ictx)); 61 36 62 fclose(f); 37 63
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