Changeset 49a736e2 in mainline


Ignore:
Timestamp:
2012-04-11T16:18:43Z (13 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
179f6f2
Parents:
c127e1c
Message:

Fix march and related defines on beagleboardxm.

Files:
9 edited

Legend:

Unmodified
Added
Removed

  • HelenOS.config

    rc127e1c r49a736e2  
    9696
    9797% CPU type
    98 @ "armv7" ARMv7
     98@ "armv7_a" ARMv7-A
    9999! [PLATFORM=arm32&MACHINE=beagleboardxm] PROCESSOR (choice)
    100100

  • boot/arch/arm32/Makefile.inc

    rc127e1c r49a736e2  
    4949BITS = 32
    5050ENDIANESS = LE
    51 EXTRA_CFLAGS = -march=armv4
     51EXTRA_CFLAGS = -march=$(subst _,-,$(PROCESSOR))
    5252
    5353ifeq ($(MACHINE), gta02)

  • boot/arch/arm32/src/mm.c

    rc127e1c r49a736e2  
    107107                "mcr p15, 0, r0, c3, c0, 0\n"
    108108               
    109 #ifdef PROCESSOR_armv7
    110                 /* Clean L2 cache */
    111                 "mov r12, #0x1\n"   //set up to invalidate L2
    112                 "smc #0\n"  //Call SMI monitor
    113                
     109#ifdef PROCESSOR_armv7_a
    114110                /* Read Auxiliary control register */
    115111                "mrc p15, 0, r0, c1, c0, 1\n"
    … …  
    123119                "mrc p15, 0, r0, c1, c0, 0\n"
    124120               
    125 #ifdef PROCESSOR_armv7
     121#ifdef PROCESSOR_armv7_a
    126122                /* Mask to enable paging, alignment and caching */
    127123                "ldr r1, =0x00000007\n"

  • kernel/arch/arm32/Makefile.inc

    rc127e1c r49a736e2  
    3333ATSIGN = %
    3434
    35 GCC_CFLAGS += -march=armv4
     35GCC_CFLAGS += -march=$(subst _,-,$(PROCESSOR))
    3636
    3737BITS = 32

  • kernel/arch/arm32/include/asm.h

    rc127e1c r49a736e2  
    4949NO_TRACE static inline void cpu_sleep(void)
    5050{
    51 #ifdef PROCESSOR_armv7
     51#ifdef PROCESSOR_armv7_a
    5252        asm volatile ( "wfe" :: );
    5353#endif

  • kernel/arch/arm32/include/mm/page.h

    rc127e1c r49a736e2  
    5555#endif
    5656
    57 #if defined(PROCESSOR_armv7)
     57#if defined(PROCESSOR_armv7_a)
    5858#include "page_armv7.h"
    5959#elif defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)

  • kernel/arch/arm32/src/cpu/cpu.c

    rc127e1c r49a736e2  
    100100void cpu_arch_init(void)
    101101{
    102 #if defined(PROCESSOR_armv7)
     102#if defined(PROCESSOR_armv7_a)
    103103        uint32_t control_reg = 0;
    104104        asm volatile (

  • kernel/arch/arm32/src/exception.c

    rc127e1c r49a736e2  
    122122        uint32_t control_reg = 0;
    123123       
    124 #if defined(PROCESSOR_armv7)
     124#if defined(PROCESSOR_armv7_a)
    125125        asm volatile (
    126126                "mrc p15, 0, %[control_reg], c1, c0"
    … …  
    137137        control_reg |= CP15_R1_HIGH_VECTORS_BIT;
    138138       
    139 #if defined(PROCESSOR_armv7)
     139#if defined(PROCESSOR_armv7_a)
    140140        asm volatile (
    141141                "mcr p15, 0, %[control_reg], c1, c0"

  • uspace/lib/c/arch/arm32/Makefile.common

    rc127e1c r49a736e2  
    2828#
    2929
    30 GCC_CFLAGS += -ffixed-r9 -mtp=soft -fno-omit-frame-pointer -march=armv4
     30GCC_CFLAGS += -ffixed-r9 -mtp=soft -fno-omit-frame-pointer -march=$(subst _,-,$(PROCESSOR))
    3131
    3232ENDIANESS = LE
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