Changeset 4a2b52f in mainline
- Timestamp:
- 2006-02-26T16:49:35Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 481c520
- Parents:
- a29bd22
- Files:
-
- 1 added
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/src/ski/ski.c
ra29bd22 r4a2b52f 47 47 void ski_putchar(chardev_t *d, const char ch) 48 48 { 49 __asm__ (49 __asm__ volatile ( 50 50 "mov r15=%0\n" 51 51 "mov r32=%1\n" /* r32 is in0 */ … … 73 73 __u64 ch; 74 74 75 __asm__ (75 __asm__ volatile ( 76 76 "mov r15=%1\n" 77 77 "break 0x80000;;\n" /* modifies r8 */ … … 85 85 return (__s32) ch; 86 86 } 87 88 /** 89 This is blocking wrap function of ski_getchar 90 It active waits ... for using with non-stable kernel 91 */ 92 static char ski_getchar_blocking(chardev_t *d) 93 { 94 volatile int ch; 95 while(!(ch=ski_getchar())); 96 if(ch == '\r') ch = '\n'; 97 return (char) ch; 98 } 99 87 100 88 101 /** Ask keyboard if a key was pressed. */ … … 117 130 .resume = ski_kb_enable, 118 131 .suspend = ski_kb_disable, 119 .write = ski_putchar 132 .write = ski_putchar, 133 .read = ski_getchar_blocking 120 134 }; 121 135 … … 128 142 void ski_init_console(void) 129 143 { 130 __asm__ (144 __asm__ volatile ( 131 145 "mov r15=%0\n" 132 146 "break 0x80000\n" -
kernel.config
ra29bd22 r4a2b52f 89 89 @ "mm/slab1" SLAB test1 - No CPU-cache 90 90 @ "mm/slab2" SLAB test2 - SMP CPU cache 91 @ "fault/fault1" Write to NULL (maybe page fault) 91 92 @ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test 92 93 ! CONFIG_TEST (choice)
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