Changeset 4abb134 in mainline
- Timestamp:
- 2017-12-21T13:49:38Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 503086d8
- Parents:
- 6f3700d
- git-author:
- Ondřej Hlavatý <aearsis@…> (2017-12-21 13:47:22)
- git-committer:
- Ondřej Hlavatý <aearsis@…> (2017-12-21 13:49:38)
- Location:
- uspace/drv/bus/usb/xhci
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/hc.c
r6f3700d r4abb134 401 401 XHCI_REG_WR(hc->op_regs, XHCI_OP_MAX_SLOTS_EN, hc->max_slots); 402 402 403 uint64_t crptr = xhci_trb_ring_get_dequeue_ptr(&hc->cr.trb_ring); 404 XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_LO, LOWER32(crptr) >> 6); 405 XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, UPPER32(crptr)); 403 uint64_t crcr = xhci_trb_ring_get_dequeue_ptr(&hc->cr.trb_ring); 404 if (hc->cr.trb_ring.pcs) 405 crcr |= XHCI_REG_MASK(XHCI_OP_RCS); 406 XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_LO, LOWER32(crcr)); 407 XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, UPPER32(crcr)); 406 408 407 409 xhci_interrupter_regs_t *intr0 = &hc->rt_regs->ir[0]; -
uspace/drv/bus/usb/xhci/hw_struct/regs.h
r6f3700d r4abb134 409 409 #define XHCI_OP_CA crcr_lo, 32, FLAG, 2 410 410 #define XHCI_OP_CRR crcr_lo, 32, FLAG, 3 411 #define XHCI_OP_CRCR_LO crcr_lo, 32, RANGE, 31, 6 411 /* This shall be RANGE, 6, 0, but the value containing CR pointer and RCS flag 412 * must be written at once. */ 413 #define XHCI_OP_CRCR_LO crcr_lo, 32, FIELD 412 414 #define XHCI_OP_CRCR_HI crcr_hi, 32, FIELD 413 415 #define XHCI_OP_DCBAAP_LO dcbaap_lo, 32, FIELD
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