Changes in kernel/arch/amd64/src/interrupt.c [9d58539:4b0206c] in mainline
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kernel/arch/amd64/src/interrupt.c
r9d58539 r4b0206c 35 35 #include <arch/interrupt.h> 36 36 #include <print.h> 37 #include <log.h> 37 38 #include <debug.h> 38 39 #include <panic.h> … … 44 45 #include <mm/as.h> 45 46 #include <arch.h> 46 #include <arch/asm.h>47 47 #include <proc/scheduler.h> 48 48 #include <proc/thread.h> … … 54 54 #include <symtab.h> 55 55 #include <stacktrace.h> 56 #include <smp/smp_call.h> 56 57 57 58 /* … … 66 67 void istate_decode(istate_t *istate) 67 68 { 68 printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"69 log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t" 69 70 "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n", 70 71 istate->cs, istate->rip, istate->rflags, istate->error_word); 71 72 72 73 if (istate_from_uspace(istate)) 73 printf("ss =%0#18" PRIx64 "\n", istate->ss);74 75 printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"74 log_printf("ss =%0#18" PRIx64 "\n", istate->ss); 75 76 log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t" 76 77 "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n", 77 78 istate->rax, istate->rbx, istate->rcx, istate->rdx); 78 79 79 printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"80 log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t" 80 81 "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n", 81 82 istate->rsi, istate->rdi, istate->rbp, … … 83 84 (uintptr_t) &istate->rsp); 84 85 85 printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"86 log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t" 86 87 "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n", 87 88 istate->r8, istate->r9, istate->r10, istate->r11); 88 89 89 printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"90 log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t" 90 91 "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n", 91 92 istate->r12, istate->r13, istate->r14, istate->r15); … … 161 162 tlb_shootdown_ipi_recv(); 162 163 } 164 165 static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate) 166 { 167 trap_virtual_eoi(); 168 smp_call_ipi_recv(); 169 } 163 170 #endif 164 171 … … 193 200 */ 194 201 #ifdef CONFIG_DEBUG 195 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum); 202 log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)", 203 CPU->id, inum); 196 204 #endif 197 205 } … … 214 222 } 215 223 216 exc_register( 0, "de_fault", true, (iroutine_t) de_fault);217 exc_register( 7, "nm_fault", true, (iroutine_t) nm_fault);218 exc_register( 12, "ss_fault", true, (iroutine_t) ss_fault);219 exc_register( 13, "gp_fault", true, (iroutine_t) gp_fault);224 exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault); 225 exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault); 226 exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault); 227 exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault); 220 228 221 229 #ifdef CONFIG_SMP 222 230 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true, 223 231 (iroutine_t) tlb_shootdown_ipi); 232 exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true, 233 (iroutine_t) arch_smp_call_ipi_recv); 224 234 #endif 225 235 }
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