Changeset 4b27f5f in mainline
- Timestamp:
- 2013-08-03T10:37:02Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 2e842f2
- Parents:
- 85a54b4
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/arm32/src/mm.c
r85a54b4 r4b27f5f 141 141 * we disable caches before jumping to kernel 142 142 * so this is safe for all archs. 143 * Enable VMSAv6 the bit (23) is only writable on ARMv6. 143 144 */ 144 "ldr r1, =0x00 001805\n"145 "ldr r1, =0x00801805\n" 145 146 146 147 "orr r0, r0, r1\n"
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