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  • boot/arch/arm32/include/mm.h

    rb5a3b50 r4d02595  
    4747/** Describe "section" page table entry (one-level paging with 1 MB sized pages). */
    4848#define PTE_DESCRIPTOR_SECTION  0x02
    49 /** Shift of memory address in section descriptor */
    50 #define PTE_SECTION_SHIFT  20
    5149
    5250/** Page table access rights: user - no access, kernel - read/write. */
    5351#define PTE_AP_USER_NO_KERNEL_RW  0x01
    54 
    55 /** Start of memory mapped I/O area for GTA02 */
    56 #define GTA02_IOMEM_START  0x48000000
    57 /** End of memory mapped I/O area for GTA02 */
    58 #define GTA02_IOMEM_END  0x60000000
    5952
    6053/* Page table level 0 entry - "section" format is used
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