Changes in uspace/lib/c/arch/arm32/src/atomic.c [25fdb2d:51949d0] in mainline
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uspace/lib/c/arch/arm32/src/atomic.c
r25fdb2d r51949d0 40 40 unsigned long long __atomic_load_8(const volatile void *mem0, int model) 41 41 { 42 const volatile unsigned *mem = mem0; 43 44 (void) model; 45 46 union { 47 unsigned long long a; 48 unsigned b[2]; 49 } ret; 50 51 /* 52 * The following instructions between labels 1 and 2 constitute a 53 * Restartable Atomic Seqeunce. Should the sequence be non-atomic, 54 * the kernel will restart it. 55 */ 56 asm volatile ( 57 "1:\n" 58 " adr %[ret0], 1b\n" 59 " str %[ret0], %[rp0]\n" 60 " adr %[ret0], 2f\n" 61 " str %[ret0], %[rp1]\n" 62 63 " ldr %[ret0], %[addr0]\n" 64 " ldr %[ret1], %[addr1]\n" 65 "2:\n" 66 : [ret0] "=&r" (ret.b[0]), 67 [ret1] "=&r" (ret.b[1]), 42 const volatile unsigned long long *mem = mem0; 43 44 (void) model; 45 46 unsigned long long ret; 47 48 /* 49 * The following instructions between labels 1 and 2 constitute a 50 * Restartable Atomic Seqeunce. Should the sequence be non-atomic, 51 * the kernel will restart it. 52 */ 53 asm volatile ( 54 "1:\n" 55 " adr %[ret], 1b\n" 56 " str %[ret], %[rp0]\n" 57 " adr %[ret], 2f\n" 58 " str %[ret], %[rp1]\n" 59 60 " ldrd %[ret], %[addr]\n" 61 "2:\n" 62 : [ret] "=&r" (ret), 68 63 [rp0] "=m" (ras_page[0]), 69 64 [rp1] "=m" (ras_page[1]) 70 : [addr0] "m" (mem[0]), 71 [addr1] "m" (mem[1]) 72 ); 73 74 ras_page[0] = 0; 75 ras_page[1] = 0xffffffff; 76 77 return ret.a; 65 : [addr] "m" (*mem) 66 ); 67 68 ras_page[0] = 0; 69 ras_page[1] = 0xffffffff; 70 71 return ret; 78 72 } 79 73 80 74 void __atomic_store_8(volatile void *mem0, unsigned long long val, int model) 81 75 { 82 volatile unsigned *mem = mem0; 83 84 (void) model; 85 86 union { 87 unsigned long long a; 88 unsigned b[2]; 89 } v; 90 91 v.a = val; 76 volatile unsigned long long *mem = mem0; 77 78 (void) model; 92 79 93 80 /* scratch register */ … … 106 93 " str %[tmp], %[rp1]\n" 107 94 108 " str %[val0], %[addr0]\n" 109 " str %[val1], %[addr1]\n" 95 " strd %[imm], %[addr]\n" 110 96 "2:\n" 111 97 : [tmp] "=&r" (tmp), 112 98 [rp0] "=m" (ras_page[0]), 113 99 [rp1] "=m" (ras_page[1]), 114 [addr0] "=m" (mem[0]), 115 [addr1] "=m" (mem[1]) 116 : [val0] "r" (v.b[0]), 117 [val1] "r" (v.b[1]) 100 [addr] "=m" (*mem) 101 : [imm] "r" (val) 118 102 ); 119 103
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