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  • kernel/arch/arm32/src/exception.c

    r9a5ccc14 r5481a22e  
    3939#include <interrupt.h>
    4040#include <arch/mm/page_fault.h>
    41 #include <arch/cp15.h>
    4241#include <arch/barrier.h>
    4342#include <print.h>
     
    7473        /* make it LDR instruction and store at exception vector */
    7574        *vector = handler_address_ptr | LDR_OPCODE;
    76         smc_coherence(vector);
     75        smc_coherence(*vector);
    7776       
    7877        /* store handler's address */
     
    137136static void high_vectors(void)
    138137{
    139         uint32_t control_reg = SCTLR_read();
     138        uint32_t control_reg = 0;
     139        asm volatile (
     140                "mrc p15, 0, %[control_reg], c1, c0"
     141                : [control_reg] "=r" (control_reg)
     142        );
    140143       
    141144        /* switch on the high vectors bit */
    142         control_reg |= SCTLR_HIGH_VECTORS_EN_FLAG;
    143        
    144         SCTLR_write(control_reg);
     145        control_reg |= CP15_R1_HIGH_VECTORS_EN;
     146       
     147        asm volatile (
     148                "mcr p15, 0, %[control_reg], c1, c0"
     149                :: [control_reg] "r" (control_reg)
     150        );
    145151}
    146152#endif
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