Changes in kernel/arch/arm32/src/exception.c [9a5ccc14:5481a22e] in mainline
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kernel/arch/arm32/src/exception.c
r9a5ccc14 r5481a22e 39 39 #include <interrupt.h> 40 40 #include <arch/mm/page_fault.h> 41 #include <arch/cp15.h>42 41 #include <arch/barrier.h> 43 42 #include <print.h> … … 74 73 /* make it LDR instruction and store at exception vector */ 75 74 *vector = handler_address_ptr | LDR_OPCODE; 76 smc_coherence( vector);75 smc_coherence(*vector); 77 76 78 77 /* store handler's address */ … … 137 136 static void high_vectors(void) 138 137 { 139 uint32_t control_reg = SCTLR_read(); 138 uint32_t control_reg = 0; 139 asm volatile ( 140 "mrc p15, 0, %[control_reg], c1, c0" 141 : [control_reg] "=r" (control_reg) 142 ); 140 143 141 144 /* switch on the high vectors bit */ 142 control_reg |= SCTLR_HIGH_VECTORS_EN_FLAG; 143 144 SCTLR_write(control_reg); 145 control_reg |= CP15_R1_HIGH_VECTORS_EN; 146 147 asm volatile ( 148 "mcr p15, 0, %[control_reg], c1, c0" 149 :: [control_reg] "r" (control_reg) 150 ); 145 151 } 146 152 #endif
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