Changes in kernel/arch/ia64/src/mm/tlb.c [1dbc43f:560b81c] in mainline
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kernel/arch/ia64/src/mm/tlb.c
r1dbc43f r560b81c 477 477 /** Instruction TLB fault handler for faults with VHPT turned off. 478 478 * 479 * @param vectorInterruption vector.479 * @param n Interruption vector. 480 480 * @param istate Structure with saved interruption state. 481 481 * 482 482 */ 483 void alternate_instruction_tlb_fault(u int64_t vector, istate_t *istate)483 void alternate_instruction_tlb_fault(unsigned int n, istate_t *istate) 484 484 { 485 485 uintptr_t va; 486 pte_t *t;486 pte_t t; 487 487 488 488 va = istate->cr_ifa; /* faulting address */ … … 490 490 ASSERT(!is_kernel_fault(va)); 491 491 492 t = page_mapping_find(AS, va, true); 493 if (t) { 492 bool found = page_mapping_find(AS, va, true, &t); 493 if (found) { 494 ASSERT(t.p); 495 494 496 /* 495 497 * The mapping was found in software page hash table. 496 498 * Insert it into data translation cache. 497 499 */ 498 itc_pte_copy( t);500 itc_pte_copy(&t); 499 501 } else { 500 502 /* … … 566 568 /** Data TLB fault handler for faults with VHPT turned off. 567 569 * 568 * @param vectorInterruption vector.570 * @param n Interruption vector. 569 571 * @param istate Structure with saved interruption state. 570 572 * 571 573 */ 572 void alternate_data_tlb_fault(u int64_t vector, istate_t *istate)574 void alternate_data_tlb_fault(unsigned int n, istate_t *istate) 573 575 { 574 576 if (istate->cr_isr.sp) { … … 600 602 601 603 602 pte_t *entry = page_mapping_find(as, va, true); 603 if (entry) { 604 pte_t t; 605 bool found = page_mapping_find(as, va, true, &t); 606 if (found) { 607 ASSERT(t.p); 608 604 609 /* 605 610 * The mapping was found in the software page hash table. 606 611 * Insert it into data translation cache. 607 612 */ 608 dtc_pte_copy( entry);613 dtc_pte_copy(&t); 609 614 } else { 610 615 if (try_memmap_io_insertion(va, istate)) … … 623 628 * This fault should not occur. 624 629 * 625 * @param vectorInterruption vector.630 * @param n Interruption vector. 626 631 * @param istate Structure with saved interruption state. 627 632 * 628 633 */ 629 void data_nested_tlb_fault(u int64_t vector, istate_t *istate)634 void data_nested_tlb_fault(unsigned int n, istate_t *istate) 630 635 { 631 636 ASSERT(false); … … 634 639 /** Data Dirty bit fault handler. 635 640 * 636 * @param vectorInterruption vector.641 * @param n Interruption vector. 637 642 * @param istate Structure with saved interruption state. 638 643 * 639 644 */ 640 void data_dirty_bit_fault(u int64_t vector, istate_t *istate)645 void data_dirty_bit_fault(unsigned int n, istate_t *istate) 641 646 { 642 647 uintptr_t va; 643 pte_t *t;648 pte_t t; 644 649 as_t *as = AS; 645 650 … … 649 654 as = AS_KERNEL; 650 655 651 t = page_mapping_find(as, va, true); 652 ASSERT((t) && (t->p)); 653 if ((t) && (t->p) && (t->w)) { 656 bool found = page_mapping_find(as, va, true, &t); 657 658 ASSERT(found); 659 ASSERT(t.p); 660 661 if (found && t.p && t.w) { 654 662 /* 655 663 * Update the Dirty bit in page tables and reinsert 656 664 * the mapping into DTC. 657 665 */ 658 t->d = true; 659 dtc_pte_copy(t); 666 t.d = true; 667 dtc_pte_copy(&t); 668 page_mapping_update(as, va, true, &t); 660 669 } else { 661 670 as_page_fault(va, PF_ACCESS_WRITE, istate); … … 665 674 /** Instruction access bit fault handler. 666 675 * 667 * @param vectorInterruption vector.676 * @param n Interruption vector. 668 677 * @param istate Structure with saved interruption state. 669 678 * 670 679 */ 671 void instruction_access_bit_fault(u int64_t vector, istate_t *istate)680 void instruction_access_bit_fault(unsigned int n, istate_t *istate) 672 681 { 673 682 uintptr_t va; 674 pte_t *t;683 pte_t t; 675 684 676 685 va = istate->cr_ifa; /* faulting address */ … … 678 687 ASSERT(!is_kernel_fault(va)); 679 688 680 t = page_mapping_find(AS, va, true); 681 ASSERT((t) && (t->p)); 682 if ((t) && (t->p) && (t->x)) { 689 bool found = page_mapping_find(AS, va, true, &t); 690 691 ASSERT(found); 692 ASSERT(t.p); 693 694 if (found && t.p && t.x) { 683 695 /* 684 696 * Update the Accessed bit in page tables and reinsert 685 697 * the mapping into ITC. 686 698 */ 687 t->a = true; 688 itc_pte_copy(t); 699 t.a = true; 700 itc_pte_copy(&t); 701 page_mapping_update(AS, va, true, &t); 689 702 } else { 690 703 as_page_fault(va, PF_ACCESS_EXEC, istate); … … 694 707 /** Data access bit fault handler. 695 708 * 696 * @param vectorInterruption vector.709 * @param n Interruption vector. 697 710 * @param istate Structure with saved interruption state. 698 711 * 699 712 */ 700 void data_access_bit_fault(u int64_t vector, istate_t *istate)713 void data_access_bit_fault(unsigned int n, istate_t *istate) 701 714 { 702 715 uintptr_t va; 703 pte_t *t;716 pte_t t; 704 717 as_t *as = AS; 705 718 … … 709 722 as = AS_KERNEL; 710 723 711 t = page_mapping_find(as, va, true); 712 ASSERT((t) && (t->p)); 713 if ((t) && (t->p)) { 724 bool found = page_mapping_find(as, va, true, &t); 725 726 ASSERT(found); 727 ASSERT(t.p); 728 729 if (found && t.p) { 714 730 /* 715 731 * Update the Accessed bit in page tables and reinsert 716 732 * the mapping into DTC. 717 733 */ 718 t->a = true; 719 dtc_pte_copy(t); 734 t.a = true; 735 dtc_pte_copy(&t); 736 page_mapping_update(as, va, true, &t); 720 737 } else { 721 738 if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { … … 729 746 /** Data access rights fault handler. 730 747 * 731 * @param vectorInterruption vector.748 * @param n Interruption vector. 732 749 * @param istate Structure with saved interruption state. 733 750 * 734 751 */ 735 void data_access_rights_fault(u int64_t vector, istate_t *istate)752 void data_access_rights_fault(unsigned int n, istate_t *istate) 736 753 { 737 754 uintptr_t va; 738 pte_t *t;755 pte_t t; 739 756 740 757 va = istate->cr_ifa; /* faulting address */ … … 745 762 * Assume a write to a read-only page. 746 763 */ 747 t = page_mapping_find(AS, va, true); 748 ASSERT((t) && (t->p)); 749 ASSERT(!t->w); 764 bool found = page_mapping_find(AS, va, true, &t); 765 766 ASSERT(found); 767 ASSERT(t.p); 768 ASSERT(!t.w); 769 750 770 as_page_fault(va, PF_ACCESS_WRITE, istate); 751 771 } … … 753 773 /** Page not present fault handler. 754 774 * 755 * @param vectorInterruption vector.775 * @param n Interruption vector. 756 776 * @param istate Structure with saved interruption state. 757 777 * 758 778 */ 759 void page_not_present(u int64_t vector, istate_t *istate)779 void page_not_present(unsigned int n, istate_t *istate) 760 780 { 761 781 uintptr_t va; 762 pte_t *t;782 pte_t t; 763 783 764 784 va = istate->cr_ifa; /* faulting address */ … … 766 786 ASSERT(!is_kernel_fault(va)); 767 787 768 t = page_mapping_find(AS, va, true); 769 ASSERT(t); 770 771 if (t->p) { 788 bool found = page_mapping_find(AS, va, true, &t); 789 790 ASSERT(found); 791 792 if (t.p) { 772 793 /* 773 794 * If the Present bit is set in page hash table, just copy it 774 795 * and update ITC/DTC. 775 796 */ 776 if (t ->x)777 itc_pte_copy( t);797 if (t.x) 798 itc_pte_copy(&t); 778 799 else 779 dtc_pte_copy( t);800 dtc_pte_copy(&t); 780 801 } else { 781 802 as_page_fault(va, PF_ACCESS_READ, istate);
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