Changeset 568337b in mainline
- Timestamp:
- 2005-07-15T19:53:39Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e41c47e
- Parents:
- 26649537
- Location:
- arch/mips
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips/include/exception.h
r26649537 r568337b 34 34 #define EXC_TLBL 2 35 35 #define EXC_TLBS 3 36 #define EXC_AdEL 4 37 #define EXC_AdES 5 38 #define EXC_IBE 6 39 #define EXC_DBE 7 40 #define EXC_Sys 8 41 #define EXC_Bp 9 42 #define EXC_RI 10 43 #define EXC_CpU 11 44 #define EXC_Ov 12 45 #define EXC_Tr 13 46 #define EXC_VCEI 14 47 #define EXC_FPE 15 48 #define EXC_WATCH 23 49 #define EXC_VCED 31 36 50 37 51 extern void exception(void); -
arch/mips/src/exception.c
r26649537 r568337b 37 37 int excno; 38 38 __u32 epc; 39 __u32 epc_shift = 0; 39 40 pri_t pri; 40 41 … … 48 49 } 49 50 /* decode exception number and process the exception */ 50 switch(excno = (cp0_cause_read()>>2)&0x1f) { 51 case EXC_Int: interrupt(); break; 51 switch (excno = (cp0_cause_read() >> 2) & 0x1f) { 52 case EXC_Int: 53 interrupt(); 54 break; 52 55 case EXC_TLBL: 53 case EXC_TLBS: tlb_invalid(); break; 54 default: panic("unhandled exception %d\n", excno); break; 56 case EXC_TLBS: 57 tlb_invalid(); 58 break; 59 case EXC_Mod: 60 panic("unhandled TLB Modification Exception\n"); 61 break; 62 case EXC_AdEL: 63 panic("unhandled Address Error Exception - load or instruction fetch\n"); 64 break; 65 case EXC_AdES: 66 panic("unhandled Address Error Exception - store\n"); 67 break; 68 case EXC_IBE: 69 panic("unhandled Bus Error Exception - fetch instruction\n"); 70 break; 71 case EXC_DBE: 72 panic("unhandled Bus Error Exception - data reference: load or store\n"); 73 break; 74 case EXC_Bp: 75 /* it is necessary to not re-execute BREAK instruction after returning from Exception handler 76 (see page 138 in R4000 Manual for more information) */ 77 epc_shift = 4; 78 break; 79 case EXC_RI: 80 panic("unhandled Reserved Instruction Exception\n"); 81 break; 82 case EXC_CpU: 83 panic("unhandled Coprocessor Unusable Exception\n"); 84 break; 85 case EXC_Ov: 86 panic("unhandled Arithmetic Overflow Exception\n"); 87 break; 88 case EXC_Tr: 89 panic("unhandled Trap Exception\n"); 90 break; 91 case EXC_VCEI: 92 panic("unhandled Virtual Coherency Exception - instruction\n"); 93 break; 94 case EXC_FPE: 95 panic("unhandled Floating-Point Exception\n"); 96 break; 97 case EXC_WATCH: 98 panic("unhandled reference to WatchHi/WatchLo address\n"); 99 break; 100 case EXC_VCED: 101 panic("unhandled Virtual Coherency Exception - data\n"); 102 break; 103 default: 104 panic("unhandled exception %d\n", excno); 55 105 } 56 106 … … 60 110 } 61 111 62 cp0_epc_write(epc );112 cp0_epc_write(epc + epc_shift); 63 113 cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit); 64 114 cpu_priority_restore(pri);
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