Changeset 56d40fe in mainline
- Timestamp:
- 2005-10-24T20:18:55Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 81e1396
- Parents:
- 2a99fa8
- Location:
- arch
- Files:
-
- 1 deleted
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/Makefile.inc
r2a99fa8 r56d40fe 39 39 src/arch/drivers/i8254.c \ 40 40 src/arch/drivers/i8259.c \ 41 src/arch/supplib.c \42 41 src/arch/delay.S \ 43 42 src/arch/amd64.c \ -
arch/amd64/include/memstr.h
r2a99fa8 r56d40fe 30 30 #define __amd64_MEMSTR_H__ 31 31 32 #define memcpy(dst, src, cnt) __builtin_memcpy((dst), (src), (cnt)); 32 /** Copy memory 33 * 34 * Copy a given number of bytes (3rd argument) 35 * from the memory location defined by 2nd argument 36 * to the memory location defined by 1st argument. 37 * The memory areas cannot overlap. 38 * 39 * @param dst Destination 40 * @param src Source 41 * @param cnt Number of bytes 42 * @return Destination 43 */ 44 static inline void * memcpy(void * dst, const void * src, size_t cnt) 45 { 46 __native d0, d1, d2; 33 47 34 extern void memsetw(__address dst, size_t cnt, __u16 x); 35 extern void memsetb(__address dst, size_t cnt, __u8 x); 36 extern int memcmp(__address src, __address dst, int cnt); 48 __asm__ __volatile__( 49 "rep movsq\n\t" 50 "movq %4, %%rcx\n\t" 51 "andq $7, %%rcx\n\t" 52 "jz 1f\n\t" 53 "rep movsb\n\t" 54 "1:\n" 55 : "=&c" (d0), "=&D" (d1), "=&S" (d2) 56 : "0" ((__native)(cnt / 8)), "g" ((__native)cnt), "1" ((__native) dst), "2" ((__native) src) 57 : "memory"); 58 59 return dst; 60 } 61 62 63 /** Compare memory regions for equality 64 * 65 * Compare a given number of bytes (3rd argument) 66 * at memory locations defined by 1st and 2nd argument 67 * for equality. If bytes are equal function returns 0. 68 * 69 * @param src Region 1 70 * @param dst Region 2 71 * @param cnt Number of bytes 72 * @return Zero if bytes are equal, non-zero otherwise 73 */ 74 static inline int memcmp(const void * src, const void * dst, size_t cnt) 75 { 76 __native d0, d1, d2; 77 __native ret; 78 79 __asm__ ( 80 "repe cmpsb\n\t" 81 "je 1f\n\t" 82 "movq %3, %0\n\t" 83 "addq $1, %0\n\t" 84 "1:\n" 85 : "=a" (ret), "=%S" (d0), "=&D" (d1), "=&c" (d2) 86 : "0" (0), "1" (src), "2" (dst), "3" ((__native)cnt) 87 ); 88 89 return ret; 90 } 91 92 /** Fill memory with words 93 * Fill a given number of words (2nd argument) 94 * at memory defined by 1st argument with the 95 * word value defined by 3rd argument. 96 * 97 * @param dst Destination 98 * @param cnt Number of words 99 * @param x Value to fill 100 */ 101 static inline void memsetw(__address dst, size_t cnt, __u16 x) 102 { 103 __native d0, d1; 104 105 __asm__ __volatile__ ( 106 "rep stosw\n\t" 107 : "=&D" (d0), "=&c" (d1), "=a" (x) 108 : "0" (dst), "1" ((__native)cnt), "2" (x) 109 : "memory" 110 ); 111 112 } 113 114 /** Fill memory with bytes 115 * Fill a given number of bytes (2nd argument) 116 * at memory defined by 1st argument with the 117 * word value defined by 3rd argument. 118 * 119 * @param dst Destination 120 * @param cnt Number of bytes 121 * @param x Value to fill 122 */ 123 static inline void memsetb(__address dst, size_t cnt, __u8 x) 124 { 125 __native d0, d1; 126 127 __asm__ __volatile__ ( 128 "rep stosb\n\t" 129 : "=&D" (d0), "=&c" (d1), "=a" (x) 130 : "0" (dst), "1" ((__native)cnt), "2" (x) 131 : "memory" 132 ); 133 134 } 37 135 38 136 #endif -
arch/ia32/include/memstr.h
r2a99fa8 r56d40fe 44 44 static inline void * memcpy(void * dst, const void * src, size_t cnt) 45 45 { 46 __ u32d0, d1, d2;46 __native d0, d1, d2; 47 47 48 48 __asm__ __volatile__( … … 60 60 "1:\n" 61 61 : "=&c" (d0), "=&D" (d1), "=&S" (d2) 62 : "0" ( cnt / 4), "g" (cnt), "1" ((__u32) dst), "2" ((__u32) src)62 : "0" ((__native) (cnt / 4)), "g" ((__native) cnt), "1" ((__native) dst), "2" ((__native) src) 63 63 : "memory"); 64 64 … … 78 78 * @return Zero if bytes are equal, non-zero otherwise 79 79 */ 80 static inline int memcmp( __address src, __addressdst, size_t cnt)80 static inline int memcmp(const void * src, const void * dst, size_t cnt) 81 81 { 82 82 __u32 d0, d1, d2; … … 90 90 "1:\n" 91 91 : "=a" (ret), "=%S" (d0), "=&D" (d1), "=&c" (d2) 92 : "0" (0), "1" ( src), "2" (dst), "3" (cnt)92 : "0" (0), "1" ((__native) src), "2" ((__native) dst), "3" ((__native) cnt) 93 93 ); 94 94
Note:
See TracChangeset
for help on using the changeset viewer.