Changes in kernel/arch/ia32/src/cpu/cpu.c [45b4300:57c2a87] in mainline
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kernel/arch/ia32/src/cpu/cpu.c
r45b4300 r57c2a87 72 72 void fpu_disable(void) 73 73 { 74 asm volatile ( 75 "mov %%cr0, %%eax\n" 76 "or $8, %%eax\n" 77 "mov %%eax, %%cr0\n" 78 ::: "%eax" 79 ); 74 write_cr0(read_cr0() & ~CR0_TS); 80 75 } 81 76 82 77 void fpu_enable(void) 83 78 { 84 asm volatile ( 85 "mov %%cr0, %%eax\n" 86 "and $0xffFFffF7, %%eax\n" 87 "mov %%eax,%%cr0\n" 88 ::: "%eax" 89 ); 79 write_cr0(read_cr0() | CR0_TS); 90 80 } 91 81 … … 115 105 "mov %[help], %%cr4\n" 116 106 : [help] "+r" (help) 117 : [mask] "i" (CR4_OSFXSR _MASK | CR4_OSXMMEXCPT_MASK)107 : [mask] "i" (CR4_OSFXSR | CR4_OSXMMEXCPT) 118 108 ); 119 109 } … … 160 150 void cpu_print_report(cpu_t* cpu) 161 151 { 162 printf("cpu%u: (%s family=%u model=%u stepping=%u ) %" PRIu16 " MHz\n",163 cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family,164 cpu->arch.model, cpu->arch.stepping, cpu-> frequency_mhz);152 printf("cpu%u: (%s family=%u model=%u stepping=%u apicid=%u) %" PRIu16 153 " MHz\n", cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family, 154 cpu->arch.model, cpu->arch.stepping, cpu->arch.id, cpu->frequency_mhz); 165 155 } 166 156
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