Changes in uspace/drv/bus/usb/uhci/hc.h [b5111c46:58563585] in mainline
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uspace/drv/bus/usb/uhci/hc.h
rb5111c46 r58563585 33 33 * @brief UHCI host controller driver structure 34 34 */ 35 35 36 #ifndef DRV_UHCI_HC_H 36 37 #define DRV_UHCI_HC_H 37 38 38 #include <ddf/driver.h>39 #include <ddf/interrupt.h>40 39 #include <device/hw_res_parsed.h> 41 40 #include <fibril.h> 41 #include <macros.h> 42 #include <stdbool.h> 43 #include <sys/types.h> 42 44 #include <usb/host/hcd.h> 45 #include <usb/host/usb_transfer_batch.h> 43 46 47 #include "uhci_rh.h" 44 48 #include "transfer_list.h" 49 #include "hw_struct/link_pointer.h" 45 50 46 51 /** UHCI I/O registers layout */ … … 83 88 /** SOF modification to match external timers */ 84 89 ioport8_t sofmod; 90 91 PADD8[3]; 92 ioport16_t ports[]; 85 93 } uhci_regs_t; 86 94 87 95 #define UHCI_FRAME_LIST_COUNT 1024 88 #define UHCI_INT_EMULATOR_TIMEOUT 1000089 96 #define UHCI_DEBUGER_TIMEOUT 5000000 90 97 #define UHCI_ALLOWED_HW_FAIL 5 91 #define UHCI_NEEDED_IRQ_COMMANDS 592 98 93 99 /** Main UHCI driver structure */ 94 100 typedef struct hc { 95 /** Generic HCD driver structure */ 96 hcd_t *generic; 97 101 uhci_rh_t rh; 98 102 /** Addresses of I/O registers */ 99 103 uhci_regs_t *registers; … … 113 117 /** Pointer table to the above lists, helps during scheduling */ 114 118 transfer_list_t *transfers[2][4]; 115 /** Fibril periodically checking status register*/116 fid_t interrupt_emulator;117 119 /** Indicator of hw interrupts availability */ 118 120 bool hw_interrupts; … … 122 124 } hc_t; 123 125 124 int hc_register_irq_handler(ddf_dev_t *, addr_range_t *, int, 125 interrupt_handler_t); 126 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, 127 addr_range_t *); 128 void hc_interrupt(hc_t *instance, uint16_t status); 129 int hc_init(hc_t *, ddf_fun_t *, addr_range_t *, bool); 126 extern int hc_init(hc_t *, const hw_res_list_parsed_t *, bool); 127 extern void hc_fini(hc_t *); 130 128 131 /** Safely dispose host controller internal structures 132 * 133 * @param[in] instance Host controller structure to use. 134 */ 135 static inline void hc_fini(hc_t *instance) {} /* TODO: implement*/ 129 extern int uhci_hc_gen_irq_code(irq_code_t *, const hw_res_list_parsed_t *); 130 131 extern void uhci_hc_interrupt(hcd_t *, uint32_t); 132 extern int uhci_hc_status(hcd_t *, uint32_t *); 133 extern int uhci_hc_schedule(hcd_t *, usb_transfer_batch_t *); 134 136 135 #endif 137 136
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