Changeset 59a72f8 in mainline
- Timestamp:
- 2013-06-08T09:16:16Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 273c976
- Parents:
- e006ba5
- Location:
- kernel
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/mach/beagleboardxm/beagleboardxm.c
re006ba5 r59a72f8 85 85 static void bb_timer_irq_handler(irq_t *irq) 86 86 { 87 // FIXME Ignore the weird ghost interrupt 88 if (!amdm37x_gpt_irq_ack(&beagleboard.timer)) 89 return; 90 87 91 /* 88 92 * We are holding a lock which prevents preemption. 89 93 * Release the lock, call clock() and reacquire the lock again. 90 94 */ 91 amdm37x_gpt_irq_ack(&beagleboard.timer);92 95 spinlock_unlock(&irq->lock); 93 96 clock(); -
kernel/genarch/include/genarch/drivers/amdm37x/gpt.h
re006ba5 r59a72f8 39 39 #include <typedefs.h> 40 40 #include <mm/km.h> 41 #include <time/clock.h> 41 42 42 43 /* AMDM37x TRM p. 2740 */ … … 128 129 #define AMDM37x_GPT_TCLR_CE_FLAG (1 << 6) 129 130 #define AMDM37x_GPT_TCLR_SCPWM (1 << 7) 130 #define AMDM37x_GPT_TCLR_TCM_MASK (0x3) 131 #define AMDM37x_GPT_TCLR_TCM_SHIFT (8) 132 #define AMDM37x_GPT_TCLR_TRG_MASK (0x3) 133 #define AMDM37x_GPT_TCLR_TRG_SHIFT (10) 131 #define AMDM37x_GPT_TCLR_TCM_MASK (0x3 << 8) 132 #define AMDM37x_GPT_TCLR_TCM_NO_CAPTURE (0x0 << 8) 133 #define AMDM37x_GPT_TCLR_TCM_RAISE_CAPTURE (0x1 << 8) 134 #define AMDM37x_GPT_TCLR_TCM_FALL_CAPTURE (0x2 << 8) 135 #define AMDM37x_GPT_TCLR_TCM_BOTH_CAPTURE (0x3 << 8) 136 #define AMDM37x_GPT_TCLR_TRG_MASK (0x3 << 10) 137 #define AMDM37x_GPT_TCLR_TRG_NO (0x0 << 10) 138 #define AMDM37x_GPT_TCLR_TRG_OVERFLOW (0x1 << 10) 139 #define AMDM37x_GPT_TCLR_TRG_OVERMATCH (0x2 << 10) 134 140 #define AMDM37x_GPT_TCLR_PT_FLAG (1 << 12) 135 141 #define AMDM37x_GPT_TCLR_CAPT_MODE_FLAG (1 << 13) … … 209 215 timer->regs = (void*) km_map(ioregs, iosize, PAGE_NOT_CACHEABLE); 210 216 217 /* Reset the timer */ 218 timer->regs->tiocp_cfg |= AMDM37x_GPT_TIOCP_CFG_SOFTRESET_FLAG; 219 220 while (timer->regs->tistat & AMDM37x_GPT_TISTAT_RESET_DONE_FLAG); 221 211 222 /* Set autoreload */ 212 timer->regs->tclr = AMDM37x_GPT_TCLR_AR_FLAG;223 timer->regs->tclr |= AMDM37x_GPT_TCLR_AR_FLAG; 213 224 214 225 timer->special_available = ( … … 216 227 (ioregs == AMDM37x_GPT2_BASE_ADDRESS) || 217 228 (ioregs == AMDM37x_GPT10_BASE_ADDRESS)); 229 /* Select reload value */ 218 230 timer->regs->tldr = 0xffffffff - (32768 / hz) + 1; 231 /* Set current counter value */ 219 232 timer->regs->tccr = 0xffffffff - (32768 / hz) + 1; 233 220 234 if (timer->special_available) { 221 /* Set values foraccording to formula (manual p. 2733) */235 /* Set values according to formula (manual p. 2733) */ 222 236 /* Use temporary variables for easier debugging */ 223 237 const uint32_t tpir = 224 238 ((32768 / hz + 1) * 1000000) - (32768000L * (1000 / hz)); 225 239 const uint32_t tnir = 226 ((32768 / hz) * 1000000) - (32768000 * (1000 / hz));240 ((32768 / hz) * 1000000) - (32768000L * (1000 / hz)); 227 241 timer->regs->tpir = tpir; 228 242 timer->regs->tnir = tnir; … … 241 255 } 242 256 243 static inline voidamdm37x_gpt_irq_ack(amdm37x_gpt_t* timer)257 static inline bool amdm37x_gpt_irq_ack(amdm37x_gpt_t* timer) 244 258 { 245 259 ASSERT(timer); 246 260 ASSERT(timer->regs); 247 261 /* Clear all pending interrupts */ 248 timer->regs->tisr = timer->regs->tisr; 262 const uint32_t tisr = timer->regs->tisr; 263 timer->regs->tisr = tisr; 264 return tisr != 0; 249 265 } 250 266
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