Changes in kernel/arch/sparc64/src/mm/sun4u/tlb.c [560b81c:59fb782] in mainline

File:

• kernel/arch/sparc64/src/mm/sun4u/tlb.c (modified) (6 diffs)

kernel/arch/sparc64/src/mm/sun4u/tlb.c

@@ -194 +194 @@
 
 /** ITLB miss handler. */
-void fast_instruction_access_mmu_miss(unsigned int tt, istate_t *istate)
+void fast_instruction_access_mmu_miss(sysarg_t unused, istate_t *istate)
 {
         size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
-        pte_t t;
-
-        bool found = page_mapping_find(AS, istate->tpc, true, &t);
-        if (found && PTE_EXECUTABLE(&t)) {
-                ASSERT(t.p);
-
+        pte_t *t;
+
+        t = page_mapping_find(AS, istate->tpc, true);
+        if (t && PTE_EXECUTABLE(t)) {
                 /*
                  * The mapping was found in the software page hash table.
                  * Insert it into ITLB.
                  */
-                t.a = true;
-                itlb_pte_copy(&t, index);
+                t->a = true;
+                itlb_pte_copy(t, index);
 #ifdef CONFIG_TSB
-                itsb_pte_copy(&t, index);
-#endif
-                page_mapping_update(AS, istate->tpc, true, &t);
+                itsb_pte_copy(t, index);
+#endif
         } else {
                 /*
@@ -227 +224 @@
  * low-level, assembly language part of the fast_data_access_mmu_miss handler.
  *
- * @param tt            Trap type.
+ * @param tag           Content of the TLB Tag Access register as it existed
+ *                      when the trap happened. This is to prevent confusion
+ *                      created by clobbered Tag Access register during a nested
+ *                      DTLB miss.
  * @param istate        Interrupted state saved on the stack.
  */
-void fast_data_access_mmu_miss(unsigned int tt, istate_t *istate)
-{
-        tlb_tag_access_reg_t tag;
+void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
+{
         uintptr_t page_8k;
         uintptr_t page_16k;
         size_t index;
-        pte_t t;
+        pte_t *t;
         as_t *as = AS;
 
-        tag.value = istate->tlb_tag_access;
         page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH;
         page_16k = ALIGN_DOWN(page_8k, PAGE_SIZE);
@@ -256 +254 @@
         }
 
-        bool found = page_mapping_find(as, page_16k, true, &t);
-        if (found) {
-                ASSERT(t.p);
-
+        t = page_mapping_find(as, page_16k, true);
+        if (t) {
                 /*
                  * The mapping was found in the software page hash table.
                  * Insert it into DTLB.
                  */
-                t.a = true;
-                dtlb_pte_copy(&t, index, true);
+                t->a = true;
+                dtlb_pte_copy(t, index, true);
 #ifdef CONFIG_TSB
-                dtsb_pte_copy(&t, index, true);
-#endif
-                page_mapping_update(as, page_16k, true, &t);
+                dtsb_pte_copy(t, index, true);
+#endif
         } else {
                 /*
@@ -281 +276 @@
 /** DTLB protection fault handler.
  *
- * @param tt            Trap type.
+ * @param tag           Content of the TLB Tag Access register as it existed
+ *                      when the trap happened. This is to prevent confusion
+ *                      created by clobbered Tag Access register during a nested
+ *                      DTLB miss.
  * @param istate        Interrupted state saved on the stack.
  */
-void fast_data_access_protection(unsigned int tt, istate_t *istate)
-{
-        tlb_tag_access_reg_t tag;
+void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
+{
         uintptr_t page_16k;
         size_t index;
-        pte_t t;
+        pte_t *t;
         as_t *as = AS;
 
-        tag.value = istate->tlb_tag_access;
         page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE);
         index = tag.vpn % MMU_PAGES_PER_PAGE;   /* 16K-page emulation */
@@ -299 +295 @@
                 as = AS_KERNEL;
 
-        bool found = page_mapping_find(as, page_16k, true, &t);
-        if (found && PTE_WRITABLE(&t)) {
-                ASSERT(t.p);
-
+        t = page_mapping_find(as, page_16k, true);
+        if (t && PTE_WRITABLE(t)) {
                 /*
                  * The mapping was found in the software page hash table and is
@@ -308 +302 @@
                  * into DTLB.
                  */
-                t.a = true;
-                t.d = true;
+                t->a = true;
+                t->d = true;
                 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_SECONDARY,
                     page_16k + index * MMU_PAGE_SIZE);
-                dtlb_pte_copy(&t, index, false);
+                dtlb_pte_copy(t, index, false);
 #ifdef CONFIG_TSB
-                dtsb_pte_copy(&t, index, false);
-#endif
-                page_mapping_update(as, page_16k, true, &t);
+                dtsb_pte_copy(t, index, false);
+#endif
         } else {
                 /*