Changes in kernel/arch/ppc32/src/fpu_context.S [b66cc97:5a42886] in mainline

File:

• kernel/arch/ppc32/src/fpu_context.S (modified) (8 diffs)

kernel/arch/ppc32/src/fpu_context.S

@@ -27 +27 @@
 #
 
-#include <abi/asmtool.h>
 #include <arch/asm/regname.h>
 #include <arch/fpu_context_struct.h>
@@ -33 +32 @@
 
 .text
+
+.global fpu_context_save
+.global fpu_context_restore
+.global fpu_init
+.global fpu_enable
+.global fpu_disable
 
 .macro FPU_CONTEXT_STORE r
@@ -104 +109 @@
 .endm
 
-FUNCTION_BEGIN(fpu_context_save)
+fpu_context_save:
         FPU_CONTEXT_STORE r3
         
@@ -111 +116 @@
         
         blr
-FUNCTION_END(fpu_context_save)
 
-FUNCTION_BEGIN(fpu_context_restore)
+fpu_context_restore:
         lfd fr0, FPU_CONTEXT_OFFSET_FPSCR(r3)
         mtfsf 0xff, fr0
@@ -120 +124 @@
         
         blr
-FUNCTION_END(fpu_context_restore)
 
-FUNCTION_BEGIN(fpu_init)
+fpu_init:
         mfmsr r0
         ori r0, r0, MSR_FP
@@ -134 +137 @@
         
         blr
-FUNCTION_END(fpu_init)
 
-FUNCTION_BEGIN(fpu_enable)
+fpu_enable:
         mfmsr r0
         ori r0, r0, MSR_FP
@@ -142 +144 @@
         isync
         blr
-FUNCTION_END(fpu_enable)
 
-FUNCTION_BEGIN(fpu_disable)
+fpu_disable:
         mfmsr r0
         li r3, MSR_FP
@@ -151 +152 @@
         isync
         blr
-FUNCTION_END(fpu_disable)