Changeset 5ac2e61 in mainline
- Timestamp:
- 2006-02-22T23:45:51Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ab46edb
- Parents:
- 7d53ef4
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/_link.ld.in
r7d53ef4 r5ac2e61 12 12 13 13 SECTIONS { 14 .image 0x 0000000000100000: AT (0x0000000000100000) {14 .image 0xe000000000100000: AT (0x0000000000100000) { 15 15 ktext_start = .; 16 16 *(K_TEXT_START); … … 38 38 _hardcoded_ktext_size = ktext_end - ktext_start; 39 39 _hardcoded_kdata_size = kdata_end - kdata_start; 40 _hardcoded_load_address = 0x 0000000000100000;40 _hardcoded_load_address = 0xe000000000100000; 41 41 42 42 } -
arch/ia64/include/faddr.h
r7d53ef4 r5ac2e61 46 46 47 47 __asm__( 48 "nop 0;;" 49 "nop 0;;" 50 "nop 0;;" 51 "nop 0;;" 52 "nop 0;;" 53 "nop 0;;" 54 "nop 0;;" 55 "nop 0;;" 48 56 "ld8 %0 = [%1]\n\t" 57 "nop 0;;" 58 "nop 0;;" 59 "nop 0;;" 60 "nop 0;;" 61 "nop 0;;" 62 "nop 0;;" 63 "nop 0;;" 64 "nop 0;;" 65 49 66 : "=r" (faddr) 50 67 : "r" (fptr) 51 68 ); 52 69 70 71 /*faddr = *((__address *)(fptr));;*/ 53 72 return faddr; 54 73 } -
arch/ia64/include/mm/asid.h
r7d53ef4 r5ac2e61 30 30 #define __ia64_ASID_H__ 31 31 32 #ifndef __ASM__ 33 32 34 #include <arch/types.h> 33 35 … … 39 41 * but those extra bits are not used by the kernel. 40 42 */ 43 #endif 44 41 45 #define RIDS_PER_ASID 7 42 46 #define RID_MAX 262143 /* 2^18 - 1 */ … … 45 49 #define RID2ASID(rid) ((rid)/RIDS_PER_ASID) 46 50 51 #ifndef __ASM__ 52 53 47 54 typedef __u32 rid_t; 55 56 #endif 48 57 49 58 #define ASID_MAX_ARCH (RID_MAX/RIDS_PER_ASID) -
arch/ia64/include/mm/page.h
r7d53ef4 r5ac2e61 31 31 #define __ia64_PAGE_H__ 32 32 33 #ifndef __ASM__ 34 35 33 36 #include <arch/mm/frame.h> 37 #include <arch/barrier.h> 34 38 #include <genarch/mm/page_ht.h> 35 39 #include <arch/mm/asid.h> … … 38 42 #include <debug.h> 39 43 44 #endif 45 40 46 #define PAGE_SIZE FRAME_SIZE 41 47 #define PAGE_WIDTH FRAME_WIDTH 42 43 #define KA2PA(x) ((__address) (x)) 44 #define PA2KA(x) ((__address) (x)) 48 #define KERNEL_PAGE_WIDTH 26 49 50 45 51 46 52 #define SET_PTL0_ADDRESS_ARCH(x) /**< To be removed as situation permits. */ … … 50 56 #define VRN_SHIFT 61 51 57 #define VRN_MASK (7LL << VRN_SHIFT) 52 #define VRN_KERNEL 0 58 59 #ifdef __ASM__ 60 #define VRN_KERNEL 7 61 #else 62 #define VRN_KERNEL 7LL 63 #endif 64 53 65 #define REGION_REGISTERS 8 66 67 #define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT))) 68 #define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT))) 69 54 70 55 71 #define VHPT_WIDTH 20 /* 1M */ … … 77 93 #define VA_REGION(va) (va>>VA_REGION_INDEX) 78 94 79 95 #ifndef __ASM__ 80 96 81 97 struct vhpt_tag_info { … … 264 280 extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); 265 281 266 #endif 282 283 static inline void pokus(void) 284 { 285 region_register rr; 286 rr.word=rr_read(0); 287 srlz_d(); 288 rr_write(0,rr.word); 289 srlz_d(); 290 291 } 292 293 #endif 294 295 #endif 296 297 -
arch/ia64/include/register.h
r7d53ef4 r5ac2e61 38 38 #define PSR_I_MASK 0x4000 39 39 #define PSR_PK_MASK 0x8000 40 41 #define PSR_DT_MASK (1<<17) 42 #define PSR_RT_MASK (1<<27) 43 #define PSR_IT_MASK 0x0000001000000000 44 45 40 46 41 47 /** Application registers. */ -
arch/ia64/src/mm/page.c
r7d53ef4 r5ac2e61 56 56 void set_environment(void) 57 57 { 58 59 //#ifdef NEVERDEFINED 58 60 region_register rr; 59 61 pta_register pta; 60 62 int i; 61 63 62 64 /* 63 65 * First set up kernel region register. … … 98 100 srlz_i(); 99 101 srlz_d(); 102 103 //#endif 104 105 return ; 106 100 107 } 101 108 -
arch/ia64/src/start.S
r7d53ef4 r5ac2e61 27 27 # 28 28 29 29 30 #include <arch/register.h> 31 #include <arch/mm/page.h> 32 #include <arch/mm/asid.h> 33 #include <mm/asid.h> 34 35 36 #define RR_MASK (0xFFFFFFFF00000002) 37 #define RID_SHIFT 8 38 #define PS_SHIFT 2 39 40 41 #define KERNEL_TRANSLATION_I 0x0010000000000661 42 #define KERNEL_TRANSLATION_D 0x0010000000000661 43 30 44 31 45 .section K_TEXT_START … … 37 51 .auto 38 52 53 #Fill TR.i and TR.d and enable paging 54 55 mov r9=rr[r0] 56 movl r10=(RR_MASK) 57 and r9=r10,r9 58 movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT)) 59 or r9=r10,r9 60 mov rr[r0]=r9 61 62 63 64 movl r8=(VRN_KERNEL<<VRN_SHIFT) 65 mov r9=rr[r8] 66 movl r10=(RR_MASK) 67 and r9=r10,r9 68 movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT)) 69 or r9=r10,r9 70 mov rr[r8]=r9 71 72 73 movl r8=(VRN_KERNEL<<VRN_SHIFT) 74 mov cr.ifa=r8 75 movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT) 76 mov cr.itir=r10 77 movl r10=(KERNEL_TRANSLATION_I) 78 itr.i itr[r0]=r10 79 80 # mov cr.ifa=r0 81 # movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT) 82 # mov cr.itir=r10 83 movl r10=(KERNEL_TRANSLATION_D) 84 itr.d dtr[r0]=r10 85 86 87 88 89 90 91 39 92 # initialize PSR 40 93 mov psr.l = r0 41 94 srlz.i 42 95 srlz.d 43 ssm PSR_IC_MASK 96 movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK) /*Enable paging*/ 97 mov r9=psr 98 or r10=r10,r9 99 mov cr.ipsr=r10 100 mov cr.ifs=r0 101 # movl r8=(paging_start+VRN_KERNEL<<VRN_SHIFT) 102 movl r8=paging_start 103 mov cr.iip=r8 44 104 srlz.d 105 srlz.i 106 .explicit 107 {rfi;;} 108 {nop 0;;} 109 {nop 0;;} 110 {nop 0;;} 111 {nop 0;;} 112 {nop 0;;} 113 {nop 0;;} 114 {nop 0;;} 115 {nop 0;;} 116 {nop 0;;} 117 {nop 0;;} 118 {nop 0;;} 119 {nop 0;;} 120 {nop 0;;} 121 {nop 0;;} 122 {nop 0;;} 123 {nop 0;;} 124 125 .global paging_start 126 paging_start: 127 128 .auto 45 129 46 130 # switch to register bank 1 … … 49 133 # initialize register stack 50 134 mov ar.rsc = r0 51 mov ar.bspstore = r0 135 movl r8=(VRN_KERNEL<<VRN_SHIFT) 136 mov ar.bspstore = r8 137 # mov ar.bspstore = r0 52 138 loadrs 53 139 54 140 .explicit 55 141 # initialize memory stack to some sane value 56 movl r12 = stack0 ;; 142 # movl r12 = stack0 ;; 143 movl r12 = stack0 + (VRN_KERNEL<<VRN_SHIFT);; 144 57 145 add r12 = - 16, r12 /* allocate a scratch area on the stack */ 58 146 59 147 # initialize gp (Global Pointer) register 60 movl r1 = _hardcoded_load_address 148 movl r1 = _hardcoded_load_address ;; 149 150 # movl r1 = _hardcoded_load_address + (VRN_KERNEL<<VRN_SHIFT) ;; 61 151 62 ;;63 152 64 153 # … … 72 161 addl r19 = @gprel(hardcoded_load_address), gp 73 162 ;; 74 st 8[r17] = r1475 st 8[r18] = r15163 st4 [r17] = r14 164 st4 [r18] = r15 76 165 st8 [r19] = r16 166 167 168 .auto 77 169 78 br.call.sptk.many b0=main_bsp 170 movl r18=main_bsp 171 mov b1=r18 172 br.call.sptk.many b0=b1 173 174 # br.call.sptk.many b0=main_bsp 79 175 80 176 0: -
contrib/arch/ia64/vmaxlma.c
r7d53ef4 r5ac2e61 37 37 } 38 38 39 #define ELF_VMA (0x88/sizeof(unsigned long long)) 40 #define ELF_LMA (0x90/sizeof(unsigned long long)) 39 #define ELF_VMA (0x50/sizeof(unsigned long long)) 40 #define ELF_LMA (0x58/sizeof(unsigned long long)) 41 #define ELF_ENTRY (0x18/sizeof(unsigned long long)) 41 42 42 43 #define LENGTH 0x98 … … 45 46 { 46 47 int fd; 47 unsigned long long vma, lma ;48 unsigned long long vma, lma,entry; 48 49 unsigned long long *elf; 49 50 … … 59 60 error("map failed"); 60 61 61 vma = elf[ELF_VMA];62 /*vma = elf[ELF_VMA];*/ 62 63 lma = elf[ELF_LMA]; 63 64 elf[ELF_VMA] = lma; 64 elf[ELF_LMA] = vma; 65 entry = elf[ELF_ENTRY]; 66 entry &= ((~0LL)>>3); 67 elf[ELF_ENTRY] = entry; 68 elf[ELF_ENTRY] = 0x100000; 69 /*elf[ELF_LMA] = vma;*/ 65 70 66 71 if (munmap(elf, LENGTH) == -1) -
generic/include/mm/asid.h
r7d53ef4 r5ac2e61 35 35 #define __ASID_H__ 36 36 37 #ifndef __ASM__ 38 37 39 #include <arch/mm/asid.h> 38 40 #include <typedefs.h> 41 42 #endif 39 43 40 44 #define ASID_KERNEL 0 … … 43 47 #define ASID_MAX ASID_MAX_ARCH 44 48 49 #ifndef __ASM__ 50 51 45 52 #define ASIDS_ALLOCABLE ((ASID_MAX+1)-ASID_START) 46 53 47 54 extern spinlock_t asidlock; 55 extern link_t as_with_asid_head; 48 56 49 #ifndef asid_get50 57 extern asid_t asid_get(void); 51 #endif /* !def asid_get */52 58 extern void asid_put(asid_t asid); 53 59 … … 65 71 66 72 #endif 73 74 #endif 75
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