Changeset 5bf69ac6 in mainline
- Timestamp:
- 2013-09-10T12:49:52Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 91bf378
- Parents:
- c310f9b
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/genarch/include/genarch/drivers/omap/irc.h
rc310f9b r5bf69ac6 1 1 /* 2 2 * Copyright (c) 2012 Maurizio Lombardi 3 * 3 4 * All rights reserved. 4 5 * … … 38 39 #define KERN_OMAP_IRQC_H_ 39 40 40 #include <genarch/drivers/omap/irc_regs.h>41 41 #include <typedefs.h> 42 43 #define OMAP_IRC_IRQ_GROUPS_PAD (4 - OMAP_IRC_IRQ_GROUPS_COUNT) 42 44 43 45 typedef struct { … … 107 109 #define OMAP_IRC_THRESHOLD_PRIORITYTHRESHOLD_DISABLED 0xFF 108 110 109 const uint8_t padd [20];111 const uint8_t padd3[20]; 110 112 111 113 struct { … … 143 145 /* This register contains the FIQ status after masking. */ 144 146 const ioport32_t pending_fiq; 145 } interrupts[4]; 147 } interrupts[OMAP_IRC_IRQ_GROUPS_COUNT]; 148 149 const uint32_t padd4[32 * OMAP_IRC_IRQ_GROUPS_PAD]; 146 150 147 151 /* These registers contain the priority for the interrups and … … 156 160 } omap_irc_regs_t; 157 161 158 static inline void omap_irc_init( am335x_irc_regs_t *regs)162 static inline void omap_irc_init(omap_irc_regs_t *regs) 159 163 { 160 164 int i; … … 186 190 * all interrupt lines are masked). 187 191 */ 188 for (i = 0; i < 4; ++i)192 for (i = 0; i < OMAP_IRC_IRQ_GROUPS_COUNT; ++i) 189 193 regs->interrupts[i].mir_set = 0xFFFFFFFF; 190 194 } … … 196 200 * @return The active IRQ interrupt number 197 201 */ 198 static inline unsigned omap_irc_inum_get( am335x_irc_regs_t *regs)202 static inline unsigned omap_irc_inum_get(omap_irc_regs_t *regs) 199 203 { 200 204 return regs->sir_irq & OMAP_IRC_SIR_IRQ_ACTIVEIRQ_MASK; … … 205 209 * @param regs Pointer to the irc memory mapped registers 206 210 */ 207 static inline void omap_irc_irq_ack( am335x_irc_regs_t *regs)211 static inline void omap_irc_irq_ack(omap_irc_regs_t *regs) 208 212 { 209 213 regs->control = OMAP_IRC_CONTROL_NEWIRQAGR_FLAG; … … 214 218 * @param regs Pointer to the irc memory mapped registers 215 219 */ 216 static inline void omap_irc_fiq_ack( am335x_irc_regs_t *regs)220 static inline void omap_irc_fiq_ack(omap_irc_regs_t *regs) 217 221 { 218 222 regs->control = OMAP_IRC_CONTROL_NEWFIQAGR_FLAG; … … 224 228 * @param inum The interrupt to be enabled 225 229 */ 226 static inline void omap_irc_enable( am335x_irc_regs_t *regs, unsigned inum)230 static inline void omap_irc_enable(omap_irc_regs_t *regs, unsigned inum) 227 231 { 228 232 ASSERT(inum < OMAP_IRC_IRQ_COUNT); … … 237 241 * @param inum The interrupt to be disabled 238 242 */ 239 static inline void omap_irc_disable( am335x_irc_regs_t *regs, unsigned inum)243 static inline void omap_irc_disable(omap_irc_regs_t *regs, unsigned inum) 240 244 { 241 245 ASSERT(inum < OMAP_IRC_IRQ_COUNT); … … 245 249 } 246 250 251 static inline void omap_irc_dump(omap_irc_regs_t *regs) 252 { 253 #define DUMP_REG(name) \ 254 printf("%s %p(%x).\n", #name, ®s->name, regs->name); 255 256 DUMP_REG(revision); 257 DUMP_REG(sysconfig); 258 DUMP_REG(sysstatus); 259 DUMP_REG(sir_irq); 260 DUMP_REG(sir_fiq); 261 DUMP_REG(control); 262 DUMP_REG(protection); 263 DUMP_REG(idle); 264 DUMP_REG(irq_priority); 265 DUMP_REG(fiq_priority); 266 DUMP_REG(threshold); 267 268 for (int i = 0; i < OMAP_IRC_IRQ_GROUPS_COUNT; ++i) { 269 DUMP_REG(interrupts[i].itr); 270 DUMP_REG(interrupts[i].mir); 271 DUMP_REG(interrupts[i].isr_set); 272 DUMP_REG(interrupts[i].pending_irq); 273 DUMP_REG(interrupts[i].pending_fiq); 274 } 275 for (int i = 0; i < OMAP_IRC_IRQ_COUNT; ++i) { 276 DUMP_REG(ilr[i]); 277 } 278 279 #undef DUMP_REG 280 } 281 247 282 #endif 248 283
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