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  • uspace/drv/nic/rtl8139/defs.h

    rbf84871 r5cd3d67  
    2929/** @file rtl8139_defs.h
    3030 *
    31  *  Registers, bit positions and masks definition of the RTL8139 network family
    32  *  cards
    33  */
    34 
    35 #ifndef RTL8139_DEFS_H_INCLUDED_
    36 #define RTL8139_DEFS_H_INCLUDED_
     31 * Registers, bit positions and masks definition
     32 * of the RTL8139 network family cards
     33 */
     34
     35#ifndef RTL8139_DEFS_H_
     36#define RTL8139_DEFS_H_
     37
    3738#include <sys/types.h>
    3839#include <libarch/ddi.h>
    3940
    40 
    41 /** The size of RTL8139 registers address space */
    42 #define RTL8139_IO_SIZE 256
    43 
    44 /** The maximal transmitted packet length in bytes allowed according to RTL8139
    45  *  documentation (see SIZE part of TSD documentation)
    46  */
    47 #define RTL8139_PACKET_MAX_LENGTH 1792
    48 
     41/** Size of RTL8139 registers address space */
     42#define RTL8139_IO_SIZE  256
     43
     44/** Maximal transmitted frame length
     45 *
     46 * Maximal transmitted frame length in bytes
     47 * allowed according to the RTL8139 documentation
     48 * (see SIZE part of TSD documentation).
     49 *
     50 */
     51#define RTL8139_FRAME_MAX_LENGTH  1792
    4952
    5053/** HW version
    5154 *
    52  *  as can be detected from HWVERID part of TCR
    53  *  (Transmit Configuration Register)
    54  */
    55 enum rtl8139_version_id {
     55 * As can be detected from HWVERID part of TCR
     56 * (Transmit Configuration Register).
     57 *
     58 */
     59typedef enum {
    5660        RTL8139 = 0,          /**< RTL8139 */
    5761        RTL8139A,             /**< RTL8139A */
     
    6670        RTL8101,              /**< RTL8101 */
    6771        RTL8139_VER_COUNT     /**< Count of known RTL versions, the last value */
    68 };
    69 
    70 extern const char* model_names[RTL8139_VER_COUNT];
     72} rtl8139_version_id_t;
    7173
    7274/** Registers of RTL8139 family card offsets from the memory address base */
     
    7577        MAC0  = IDR0,    /**< Alias for IDR0 */
    7678
    77         // 0x6 - 0x7 reserved
     79        // 0x06 - 0x07 reserved
    7880
    7981        MAR0    = 0x08,  /**< Multicast mask registers 8 1b registers sequence */
     
    9496
    9597        CR      = 0x37,  /**< Command register, 1b */
    96         CAPR    = 0x38,  /**< Current address of packet read, 2b */
     98        CAPR    = 0x38,  /**< Current address of frame read, 2b */
    9799        CBA     = 0x3a,  /**< Current buffer address, 2b */
    98100
     
    213215        pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED);
    214216}
     217
    215218/** Allow to change Config0-4 and BMCR register  */
    216219static inline void rtl8139_regs_unlock(void *io_base)
     
    282285        RCR_MulERINT = 1 << 17,    /**< Multiple early interrupt select */
    283286
    284         /** Minimal error packet length (1 = 8B, 0 = 64B). If AER/AR is set, RER8
     287        /** Minimal error frame length (1 = 8B, 0 = 64B). If AER/AR is set, RER8
    285288         * is "Don't care"
    286289         */
     
    302305
    303306        RCR_WRAP              = 1 << 7,  /**< Rx buffer wrapped */
    304         RCR_ACCEPT_ERROR      = 1 << 5,  /**< Accept error packet */
    305         RCR_ACCEPT_RUNT       = 1 << 4,  /**< Accept Runt (8-64 bytes) packets */
     307        RCR_ACCEPT_ERROR      = 1 << 5,  /**< Accept error frame */
     308        RCR_ACCEPT_RUNT       = 1 << 4,  /**< Accept Runt (8-64 bytes) frames */
    306309        RCR_ACCEPT_BROADCAST  = 1 << 3,  /**< Accept broadcast */
    307310        RCR_ACCEPT_MULTICAST  = 1 << 2,  /**< Accept multicast */
    308311        RCR_ACCEPT_PHYS_MATCH = 1 << 1,  /**< Accept device MAC address match */
    309         RCR_ACCEPT_ALL_PHYS   = 1 << 0,  /**< Accept all packets with
     312        RCR_ACCEPT_ALL_PHYS   = 1 << 0,  /**< Accept all frames with
    310313                                          * phys. desticnation
    311314                                                                          */
     
    362365        ANAR_ACK          = (1 << 14),  /**< Capability reception acknowledge */
    363366        ANAR_REMOTE_FAULT = (1 << 13),  /**< Remote fault detection capability */
    364         ANAR_PAUSE        = (1 << 10),  /**< Symetric pause packet capability */
     367        ANAR_PAUSE        = (1 << 10),  /**< Symetric pause frame capability */
    365368        ANAR_100T4        = (1 << 9),   /**< T4, not supported by the device */
    366369        ANAR_100TX_FD     = (1 << 8),   /**< 100BASE_TX full duplex */
     
    399402        CONFIG3_GNT_SELECT = (1 << 7),  /**< Gnt select */
    400403        CONFIG3_PARM_EN    = (1 << 6),  /**< Parameter enabled (100MBit mode) */
    401         CONFIG3_MAGIC      = (1 << 5),  /**< WoL Magic packet enable */
     404        CONFIG3_MAGIC      = (1 << 5),  /**< WoL Magic frame enable */
    402405        CONFIG3_LINK_UP    = (1 << 4),  /**< Wakeup if link is reestablished */
    403406        CONFIG3_CLKRUN_EN  = (1 << 2),  /**< CLKRUN enabled */ /* TODO: check what does it mean */
     
    416419};
    417420
    418 /** Maximal runt packet size + 1 */
    419 #define RTL8139_RUNT_MAX_SIZE 64
    420 
    421 /** Bits in packet header */
    422 enum rtl8139_packet_header {
     421/** Maximal runt frame size + 1 */
     422#define RTL8139_RUNT_MAX_SIZE  64
     423
     424/** Bits in frame header */
     425enum rtl8139_frame_header {
    423426        RSR_MAR  = (1 << 15),  /**< Multicast received */
    424427        RSR_PAM  = (1 << 14),  /**< Physical address match */
     
    426429
    427430        RSR_ISE  = (1 << 5),   /**< Invalid symbol error, 100BASE-TX only */
    428         RSR_RUNT = (1 << 4),   /**< Runt packet (< RTL8139_RUNT_MAX_SIZE bytes) */
    429 
    430         RSR_LONG = (1 << 3),   /**< Long packet (size > 4k bytes) */
     431        RSR_RUNT = (1 << 4),   /**< Runt frame (< RTL8139_RUNT_MAX_SIZE bytes) */
     432
     433        RSR_LONG = (1 << 3),   /**< Long frame (size > 4k bytes) */
    431434        RSR_CRC  = (1 << 2),   /**< CRC error */
    432435        RSR_FAE  = (1 << 1),   /**< Frame alignment error */
    433         RSR_ROK  = (1 << 0)    /**< Good packet received */
     436        RSR_ROK  = (1 << 0)    /**< Good frame received */
    434437};
    435438
     
    451454                                                                          */
    452455
    453         APPEND_CRC = 1 << 16,        /**< Append CRC at the end of a packet */
     456        APPEND_CRC = 1 << 16,        /**< Append CRC at the end of a frame */
    454457
    455458        MXTxDMA_SHIFT = 8,  /**< Max. DMA Burst per TxDMA shift, burst = 16^value */
     
    459462        TX_RETRY_COUNT_SIZE  = 4,            /**< Retries before aborting size */
    460463
    461         CLEAR_ABORT = 1 << 0    /**< Retransmit aborted packet at the last
     464        CLEAR_ABORT = 1 << 0    /**< Retransmit aborted frame at the last
    462465                                  *  transmitted descriptor
    463466                                                          */
     
    470473
    471474/** Mapping of HW version -> version ID */
    472 struct rtl8139_hwver_map { 
    473         uint32_t hwverid;                /**< HW version value in the register */
    474         enum rtl8139_version_id ver_id;  /**< appropriate version id */
     475struct rtl8139_hwver_map {
     476        uint32_t hwverid;             /**< HW version value in the register */
     477        rtl8139_version_id_t ver_id;  /**< appropriate version id */
    475478};
    476479
    477480/** Mapping of HW version -> version ID */
    478481extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1];
    479 
    480 /** Size in the packet header while copying from RxFIFO to Rx buffer */
    481 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0)
    482 /** The only supported pause packet time value */
    483 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF)
    484 
    485 /** Size of the packet header in front of the received frame */
    486 #define RTL_PACKET_HEADER_SIZE 4
     482extern const char* model_names[RTL8139_VER_COUNT];
     483
     484/** Size in the frame header while copying from RxFIFO to Rx buffer */
     485#define RTL8139_EARLY_SIZE  UINT16_C(0xfff0)
     486
     487/** The only supported pause frame time value */
     488#define RTL8139_PAUSE_VAL  UINT16_C(0xFFFF)
     489
     490/** Size of the frame header in front of the received frame */
     491#define RTL_FRAME_HEADER_SIZE  4
    487492
    488493/** 8k buffer */
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