Changes in uspace/drv/nic/rtl8139/defs.h [bf84871:5cd3d67] in mainline
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uspace/drv/nic/rtl8139/defs.h
rbf84871 r5cd3d67 29 29 /** @file rtl8139_defs.h 30 30 * 31 * Registers, bit positions and masks definition of the RTL8139 network family 32 * cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_INCLUDED_ 36 #define RTL8139_DEFS_H_INCLUDED_ 31 * Registers, bit positions and masks definition 32 * of the RTL8139 network family cards 33 */ 34 35 #ifndef RTL8139_DEFS_H_ 36 #define RTL8139_DEFS_H_ 37 37 38 #include <sys/types.h> 38 39 #include <libarch/ddi.h> 39 40 40 41 /** The size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** The maximal transmitted packet length in bytes allowed according to RTL8139 45 * documentation (see SIZE part of TSD documentation) 46 */ 47 #define RTL8139_PACKET_MAX_LENGTH 1792 48 41 /** Size of RTL8139 registers address space */ 42 #define RTL8139_IO_SIZE 256 43 44 /** Maximal transmitted frame length 45 * 46 * Maximal transmitted frame length in bytes 47 * allowed according to the RTL8139 documentation 48 * (see SIZE part of TSD documentation). 49 * 50 */ 51 #define RTL8139_FRAME_MAX_LENGTH 1792 49 52 50 53 /** HW version 51 54 * 52 * as can be detected from HWVERID part of TCR 53 * (Transmit Configuration Register) 54 */ 55 enum rtl8139_version_id { 55 * As can be detected from HWVERID part of TCR 56 * (Transmit Configuration Register). 57 * 58 */ 59 typedef enum { 56 60 RTL8139 = 0, /**< RTL8139 */ 57 61 RTL8139A, /**< RTL8139A */ … … 66 70 RTL8101, /**< RTL8101 */ 67 71 RTL8139_VER_COUNT /**< Count of known RTL versions, the last value */ 68 }; 69 70 extern const char* model_names[RTL8139_VER_COUNT]; 72 } rtl8139_version_id_t; 71 73 72 74 /** Registers of RTL8139 family card offsets from the memory address base */ … … 75 77 MAC0 = IDR0, /**< Alias for IDR0 */ 76 78 77 // 0x 6 - 0x7 reserved79 // 0x06 - 0x07 reserved 78 80 79 81 MAR0 = 0x08, /**< Multicast mask registers 8 1b registers sequence */ … … 94 96 95 97 CR = 0x37, /**< Command register, 1b */ 96 CAPR = 0x38, /**< Current address of packetread, 2b */98 CAPR = 0x38, /**< Current address of frame read, 2b */ 97 99 CBA = 0x3a, /**< Current buffer address, 2b */ 98 100 … … 213 215 pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED); 214 216 } 217 215 218 /** Allow to change Config0-4 and BMCR register */ 216 219 static inline void rtl8139_regs_unlock(void *io_base) … … 282 285 RCR_MulERINT = 1 << 17, /**< Multiple early interrupt select */ 283 286 284 /** Minimal error packetlength (1 = 8B, 0 = 64B). If AER/AR is set, RER8287 /** Minimal error frame length (1 = 8B, 0 = 64B). If AER/AR is set, RER8 285 288 * is "Don't care" 286 289 */ … … 302 305 303 306 RCR_WRAP = 1 << 7, /**< Rx buffer wrapped */ 304 RCR_ACCEPT_ERROR = 1 << 5, /**< Accept error packet*/305 RCR_ACCEPT_RUNT = 1 << 4, /**< Accept Runt (8-64 bytes) packets */307 RCR_ACCEPT_ERROR = 1 << 5, /**< Accept error frame */ 308 RCR_ACCEPT_RUNT = 1 << 4, /**< Accept Runt (8-64 bytes) frames */ 306 309 RCR_ACCEPT_BROADCAST = 1 << 3, /**< Accept broadcast */ 307 310 RCR_ACCEPT_MULTICAST = 1 << 2, /**< Accept multicast */ 308 311 RCR_ACCEPT_PHYS_MATCH = 1 << 1, /**< Accept device MAC address match */ 309 RCR_ACCEPT_ALL_PHYS = 1 << 0, /**< Accept all packets with312 RCR_ACCEPT_ALL_PHYS = 1 << 0, /**< Accept all frames with 310 313 * phys. desticnation 311 314 */ … … 362 365 ANAR_ACK = (1 << 14), /**< Capability reception acknowledge */ 363 366 ANAR_REMOTE_FAULT = (1 << 13), /**< Remote fault detection capability */ 364 ANAR_PAUSE = (1 << 10), /**< Symetric pause packetcapability */367 ANAR_PAUSE = (1 << 10), /**< Symetric pause frame capability */ 365 368 ANAR_100T4 = (1 << 9), /**< T4, not supported by the device */ 366 369 ANAR_100TX_FD = (1 << 8), /**< 100BASE_TX full duplex */ … … 399 402 CONFIG3_GNT_SELECT = (1 << 7), /**< Gnt select */ 400 403 CONFIG3_PARM_EN = (1 << 6), /**< Parameter enabled (100MBit mode) */ 401 CONFIG3_MAGIC = (1 << 5), /**< WoL Magic packetenable */404 CONFIG3_MAGIC = (1 << 5), /**< WoL Magic frame enable */ 402 405 CONFIG3_LINK_UP = (1 << 4), /**< Wakeup if link is reestablished */ 403 406 CONFIG3_CLKRUN_EN = (1 << 2), /**< CLKRUN enabled */ /* TODO: check what does it mean */ … … 416 419 }; 417 420 418 /** Maximal runt packetsize + 1 */419 #define RTL8139_RUNT_MAX_SIZE 64420 421 /** Bits in packetheader */422 enum rtl8139_ packet_header {421 /** Maximal runt frame size + 1 */ 422 #define RTL8139_RUNT_MAX_SIZE 64 423 424 /** Bits in frame header */ 425 enum rtl8139_frame_header { 423 426 RSR_MAR = (1 << 15), /**< Multicast received */ 424 427 RSR_PAM = (1 << 14), /**< Physical address match */ … … 426 429 427 430 RSR_ISE = (1 << 5), /**< Invalid symbol error, 100BASE-TX only */ 428 RSR_RUNT = (1 << 4), /**< Runt packet(< RTL8139_RUNT_MAX_SIZE bytes) */429 430 RSR_LONG = (1 << 3), /**< Long packet(size > 4k bytes) */431 RSR_RUNT = (1 << 4), /**< Runt frame (< RTL8139_RUNT_MAX_SIZE bytes) */ 432 433 RSR_LONG = (1 << 3), /**< Long frame (size > 4k bytes) */ 431 434 RSR_CRC = (1 << 2), /**< CRC error */ 432 435 RSR_FAE = (1 << 1), /**< Frame alignment error */ 433 RSR_ROK = (1 << 0) /**< Good packetreceived */436 RSR_ROK = (1 << 0) /**< Good frame received */ 434 437 }; 435 438 … … 451 454 */ 452 455 453 APPEND_CRC = 1 << 16, /**< Append CRC at the end of a packet*/456 APPEND_CRC = 1 << 16, /**< Append CRC at the end of a frame */ 454 457 455 458 MXTxDMA_SHIFT = 8, /**< Max. DMA Burst per TxDMA shift, burst = 16^value */ … … 459 462 TX_RETRY_COUNT_SIZE = 4, /**< Retries before aborting size */ 460 463 461 CLEAR_ABORT = 1 << 0 /**< Retransmit aborted packetat the last464 CLEAR_ABORT = 1 << 0 /**< Retransmit aborted frame at the last 462 465 * transmitted descriptor 463 466 */ … … 470 473 471 474 /** Mapping of HW version -> version ID */ 472 struct rtl8139_hwver_map { 473 uint32_t hwverid; 474 enum rtl8139_version_idver_id; /**< appropriate version id */475 struct rtl8139_hwver_map { 476 uint32_t hwverid; /**< HW version value in the register */ 477 rtl8139_version_id_t ver_id; /**< appropriate version id */ 475 478 }; 476 479 477 480 /** Mapping of HW version -> version ID */ 478 481 extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1]; 479 480 /** Size in the packet header while copying from RxFIFO to Rx buffer */ 481 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 482 /** The only supported pause packet time value */ 483 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF) 484 485 /** Size of the packet header in front of the received frame */ 486 #define RTL_PACKET_HEADER_SIZE 4 482 extern const char* model_names[RTL8139_VER_COUNT]; 483 484 /** Size in the frame header while copying from RxFIFO to Rx buffer */ 485 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0) 486 487 /** The only supported pause frame time value */ 488 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF) 489 490 /** Size of the frame header in front of the received frame */ 491 #define RTL_FRAME_HEADER_SIZE 4 487 492 488 493 /** 8k buffer */
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