Changes in / [c6a7b3a:5d9fce4] in mainline
- Files:
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- 57 deleted
- 38 edited
Legend:
- Unmodified
- Added
- Removed
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HelenOS.config
rc6a7b3a r5d9fce4 592 592 ! CONFIG_OPTIMIZE_FOR_SIZE (n/y) 593 593 594 % Number of consoles595 @ "1"596 @ "2"597 @ "3"598 @ "4"599 @ "5"600 @ "6"601 ! [CONFIG_FB=n] CONFIG_VC_COUNT(choice)602 603 %Kernel log on console 6604 ! [CONFIG_FB=n] CONFIG_KERNEL_LOG_VC_6 (y/n)605 606 594 % Barebone build with essential binaries only 607 595 ! CONFIG_BAREBONE (n/y) -
boot/Makefile.common
rc6a7b3a r5d9fce4 119 119 $(USPACE_PATH)/srv/taskmon/taskmon 120 120 121 RD_DRVS_ESSENTIAL = \ 122 infrastructure/root 123 124 RD_DRVS_NON_ESSENTIAL = \ 121 RD_DRVS = \ 122 infrastructure/root \ 125 123 infrastructure/rootvirt \ 126 124 fb/kfb \ … … 172 170 $(USPACE_PATH)/app/killall/killall \ 173 171 $(USPACE_PATH)/app/loc/loc \ 174 $(USPACE_PATH)/app/mixerctl/mixerctl \175 172 $(USPACE_PATH)/app/logset/logset \ 176 173 $(USPACE_PATH)/app/mkfat/mkfat \ … … 235 232 RD_SRVS = $(RD_SRVS_ESSENTIAL) 236 233 RD_APPS = $(RD_APPS_ESSENTIAL) 237 RD_DRVS = $(RD_DRVS_ESSENTIAL)238 234 else 239 235 RD_SRVS = $(RD_SRVS_ESSENTIAL) $(RD_SRVS_NON_ESSENTIAL) 240 236 RD_APPS = $(RD_APPS_ESSENTIAL) $(RD_APPS_NON_ESSENTIAL) 241 RD_DRVS = $(RD_DRVS_ESSENTIAL) $(RD_DRVS_NON_ESSENTIAL)242 237 endif 243 238 -
boot/arch/amd64/Makefile.inc
rc6a7b3a r5d9fce4 28 28 29 29 RD_SRVS_ESSENTIAL += \ 30 $(USPACE_PATH)/srv/audio/hound/hound \31 $(USPACE_PATH)/srv/devman/devman \32 30 $(USPACE_PATH)/srv/hw/irc/apic/apic \ 33 31 $(USPACE_PATH)/srv/hw/irc/i8259/i8259 … … 36 34 $(USPACE_PATH)/srv/bd/ata_bd/ata_bd 37 35 38 RD_DRVS _ESSENTIAL+= \36 RD_DRVS += \ 39 37 infrastructure/rootpc \ 40 38 bus/pci/pciintel \ 41 39 bus/isa \ 42 audio/sb16 \43 40 char/i8042 \ 41 char/ns8250 \ 44 42 char/ps2mouse \ 45 char/xtkbd 46 47 RD_DRVS_NON_ESSENTIAL += \ 48 char/ns8250 \ 43 char/xtkbd \ 49 44 time/cmos-rtc \ 50 45 bus/usb/ehci\ … … 62 57 bus/isa 63 58 64 RD_APPS_ESSENTIAL += \65 $(USPACE_PATH)/app/edit/edit \66 $(USPACE_PATH)/app/mixerctl/mixerctl \67 $(USPACE_PATH)/app/wavplay/wavplay \68 69 59 BOOT_OUTPUT = $(ROOT_PATH)/image.iso 70 60 PREBUILD = $(INITRD).img -
defaults/amd64/Makefile.config
rc6a7b3a r5d9fce4 25 25 # Kernel console support 26 26 CONFIG_KCONSOLE = y 27 28 # Number of shell consoles29 CONFIG_VC_COUNT = 530 27 31 28 # Kernel symbol information -
defaults/arm32/Makefile.config
rc6a7b3a r5d9fce4 16 16 # Kernel console support 17 17 CONFIG_KCONSOLE = y 18 19 # Number of shell consoles20 CONFIG_VC_COUNT = 521 18 22 19 # Kernel symbol information -
defaults/ia32/Makefile.config
rc6a7b3a r5d9fce4 31 31 # Kernel console support 32 32 CONFIG_KCONSOLE = y 33 34 # Number of shell consoles35 CONFIG_VC_COUNT = 536 33 37 34 # Kernel symbol information -
defaults/ia64/Makefile.config
rc6a7b3a r5d9fce4 29 29 CONFIG_KCONSOLE = y 30 30 31 # Number of shell consoles32 CONFIG_VC_COUNT = 533 34 31 # Kernel symbol information 35 32 CONFIG_SYMTAB = y -
defaults/mips32/Makefile.config
rc6a7b3a r5d9fce4 22 22 # Kernel console support 23 23 CONFIG_KCONSOLE = y 24 25 # Number of shell consoles26 CONFIG_VC_COUNT = 527 24 28 25 # Kernel symbol information -
defaults/mips64/Makefile.config
rc6a7b3a r5d9fce4 22 22 # Kernel console support 23 23 CONFIG_KCONSOLE = y 24 25 # Number of shell consoles26 CONFIG_VC_COUNT = 527 24 28 25 # Kernel symbol information -
defaults/ppc32/Makefile.config
rc6a7b3a r5d9fce4 16 16 # Kernel console support 17 17 CONFIG_KCONSOLE = y 18 19 # Number of shell consoles20 CONFIG_VC_COUNT = 521 18 22 19 # Kernel symbol information -
defaults/sparc64/Makefile.config
rc6a7b3a r5d9fce4 32 32 CONFIG_KCONSOLE = y 33 33 34 # Number of shell consoles35 CONFIG_VC_COUNT = 536 37 34 # Kernel symbol information 38 35 CONFIG_SYMTAB = y -
defaults/special/Makefile.config
rc6a7b3a r5d9fce4 17 17 CONFIG_KCONSOLE = y 18 18 19 # Number of shell consoles20 CONFIG_VC_COUNT = 521 22 19 # Kernel symbol information 23 20 CONFIG_SYMTAB = y -
kernel/arch/ia32/src/mm/frame.c
rc6a7b3a r5d9fce4 47 47 48 48 #define PHYSMEM_LIMIT32 UINT64_C(0x100000000) 49 #define PHYSMEM_LIMIT_DMA UINT64_C(0x1000000)50 49 51 50 size_t hardcoded_unmapped_ktext_size = 0; … … 92 91 else 93 92 conf = minconf; 94 95 if ((pfn * PAGE_SIZE) < PHYSMEM_LIMIT_DMA) { 96 size_t dma_count = min( 97 PHYSMEM_LIMIT_DMA / PAGE_SIZE - pfn, 98 count); 99 zone_create(pfn, dma_count, conf, 100 ZONE_AVAILABLE | ZONE_DMA); 101 count -= dma_count; 102 pfn += dma_count; 103 } 104 105 conf = pfn; 106 if (count) { 107 zone_create(pfn, count, conf, 108 ZONE_AVAILABLE | ZONE_LOWMEM); 109 } 93 zone_create(pfn, count, conf, 94 ZONE_AVAILABLE | ZONE_LOWMEM); 110 95 } else { 111 96 conf = zone_external_conf_alloc(count); 112 if (conf != 0) {97 if (conf != 0) 113 98 zone_create(pfn, count, conf, 114 99 ZONE_AVAILABLE | ZONE_HIGHMEM); 115 }116 100 } 117 101 } else if ((e820table[i].type == MEMMAP_MEMORY_ACPI) || -
kernel/generic/include/mm/frame.h
rc6a7b3a r5d9fce4 63 63 /** Allocate a frame which cannot be identity-mapped. */ 64 64 #define FRAME_HIGHMEM 0x20 65 /** Allocate a frame which needs to be from DMA zone. */66 #define FRAME_DMA 0x4067 65 68 66 typedef uint8_t zone_flags_t; … … 79 77 /** Zone contains memory that cannot be identity-mapped */ 80 78 #define ZONE_HIGHMEM 0x10 81 /** Zone contains memory suitable for old ISA DMA */82 #define ZONE_DMA 0x2083 79 84 80 /** Mask of zone bits that must be matched exactly. */ … … 86 82 87 83 #define FRAME_TO_ZONE_FLAGS(ff) \ 88 ((((ff) & FRAME_DMA) ? ZONE_DMA : \ 89 (((ff) & FRAME_LOWMEM) ? ZONE_LOWMEM : \ 84 ((((ff) & FRAME_LOWMEM) ? ZONE_LOWMEM : \ 90 85 (((ff) & FRAME_HIGHMEM) ? ZONE_HIGHMEM : \ 91 ZONE_LOWMEM /* | ZONE_HIGHMEM */)) )| \92 ZONE_AVAILABLE) 86 ZONE_LOWMEM /* | ZONE_HIGHMEM */)) | \ 87 ZONE_AVAILABLE) 93 88 94 89 #define ZONE_FLAGS_MATCH(zf, f) \ -
kernel/generic/include/time/clock.h
rc6a7b3a r5d9fce4 38 38 #include <typedefs.h> 39 39 40 #define HZ 100 040 #define HZ 100 41 41 42 42 /** Uptime structure */ -
kernel/generic/src/ddi/ddi.c
rc6a7b3a r5d9fce4 336 336 order = fnzb(pages - 1) + 1; 337 337 338 *phys = frame_alloc_noreserve(order, FRAME_DMA);338 *phys = frame_alloc_noreserve(order, 0); 339 339 if (*phys == NULL) 340 340 return ENOMEM; -
kernel/generic/src/mm/frame.c
rc6a7b3a r5d9fce4 518 518 NO_TRACE static void zone_mark_unavailable(zone_t *zone, size_t frame_idx) 519 519 { 520 if (!(zone->flags & ZONE_AVAILABLE)) 521 return; 522 // ASSERT(zone->flags & ZONE_AVAILABLE); 520 ASSERT(zone->flags & ZONE_AVAILABLE); 523 521 524 522 frame_t *frame = zone_get_frame(zone, frame_idx); … … 937 935 } 938 936 939 if (confframe >= start + count) { 940 flags &= ~ZONE_AVAILABLE; 941 goto nonavail; 942 // panic("Cannot find configuration data for zone."); 943 } 937 if (confframe >= start + count) 938 panic("Cannot find configuration data for zone."); 944 939 } 945 940 … … 965 960 return znum; 966 961 } 967 nonavail: 968 (void)0; // label trick 962 969 963 /* Non-available zone */ 970 964 size_t znum = zones_insert_zone(start, count, flags); -
uspace/Makefile
rc6a7b3a r5d9fce4 39 39 app/bnchmark \ 40 40 app/devctl \ 41 app/drec \42 41 app/edit \ 43 42 app/getterm \ … … 48 47 app/klog \ 49 48 app/loc \ 50 app/mixerctl \51 49 app/logset \ 52 50 app/mkfat \ … … 74 72 app/sysinfo \ 75 73 app/mkbd \ 76 app/wavplay \77 74 app/date \ 78 75 app/websrv \ 79 srv/audio/hound \80 76 app/vdemo \ 81 77 app/vlaunch \ … … 116 112 srv/hid/remcons \ 117 113 srv/hw/char/s3c24xx_uart \ 118 drv/audio/sb16 \119 114 drv/infrastructure/root \ 120 115 drv/infrastructure/rootvirt \ … … 215 210 lib/softfloat \ 216 211 lib/drv \ 217 lib/hound \218 212 lib/graph \ 219 213 lib/gui \ … … 228 222 lib/usbhid \ 229 223 lib/usbvirt \ 230 lib/pcm \231 224 lib/bithenge \ 232 225 lib/posix -
uspace/Makefile.common
rc6a7b3a r5d9fce4 131 131 132 132 LIBDRV_PREFIX = $(LIB_PREFIX)/drv 133 LIBHOUND_PREFIX = $(LIB_PREFIX)/hound134 LIBPCM_PREFIX = $(LIB_PREFIX)/pcm135 133 LIBNET_PREFIX = $(LIB_PREFIX)/net 136 134 LIBNIC_PREFIX = $(LIB_PREFIX)/nic … … 262 260 263 261 ifneq ($(BINARY),) 264 %.disasm: $(BINARY) _prestrip262 %.disasm: $(BINARY) 265 263 ifeq ($(CONFIG_LINE_DEBUG),y) 266 264 $(OBJDUMP) -d -S $< > $@ … … 269 267 endif 270 268 271 .INTERMEDIATE: $(BINARY)_prestrip 272 273 $(BINARY)_prestrip: $(LINKER_SCRIPT) $(OBJECTS) $(LIBS) $(BASE_LIBS) 274 $(LD) -n $(LFLAGS) -T $(LINKER_SCRIPT) -M -Map $(BINARY).map -o $@ $(OBJECTS) $(LIBS) $(BASE_LIBS) 275 276 $(BINARY): $(BINARY)_prestrip $(BINARY).disasm 277 cp $(BINARY)_prestrip $@ 269 $(BINARY): $(LINKER_SCRIPT) $(OBJECTS) $(LIBS) $(BASE_LIBS) 270 $(LD) -n $(LFLAGS) -T $(LINKER_SCRIPT) -M -Map $(BINARY).map -o $(BINARY) $(OBJECTS) $(LIBS) $(BASE_LIBS) 278 271 ifeq ($(CONFIG_STRIP_BINARIES),y) 279 272 $(STRIP) $(BINARY) -
uspace/app/init/init.c
rc6a7b3a r5d9fce4 391 391 rc = console(HID_INPUT, HID_OUTPUT); 392 392 if (rc == EOK) { 393 #ifndef CONFIG_VC_COUNT 394 #define CONFIG_VC_COUNT 6 395 #endif 396 switch((unsigned)CONFIG_VC_COUNT) { 397 default: 398 case 6: getterm("term/vc5", "/app/bdsh", false); 399 case 5: getterm("term/vc4", "/app/bdsh", false); 400 case 4: getterm("term/vc3", "/app/bdsh", false); 401 case 3: getterm("term/vc2", "/app/bdsh", false); 402 case 2: getterm("term/vc1", "/app/bdsh", false); 403 case 1: getterm("term/vc0", "/app/bdsh", true); 404 } 405 #ifdef CONFIG_KERNEL_LOG_VC_6 393 getterm("term/vc0", "/app/bdsh", true); 394 getterm("term/vc1", "/app/bdsh", false); 395 getterm("term/vc2", "/app/bdsh", false); 396 getterm("term/vc3", "/app/bdsh", false); 397 getterm("term/vc4", "/app/bdsh", false); 398 getterm("term/vc5", "/app/bdsh", false); 406 399 getterm("term/vc6", "/app/klog", false); 407 #endif408 400 } 409 401 } 410 srv_start("/srv/hound");411 402 412 403 return 0; -
uspace/drv/bus/isa/i8237.c
rc6a7b3a r5d9fce4 38 38 #include <stdbool.h> 39 39 #include <errno.h> 40 #include <ddi.h>41 #include <ddf/log.h>42 40 #include <fibril_synch.h> 43 41 #include <ddi.h> … … 200 198 .channels = { 201 199 /* The first chip 8-bit */ 202 { /* Channel 0 - Unusable*/203 .offset_reg_address =(uint8_t *) 0x00,204 .size_reg_address =(uint8_t *) 0x01,205 .page_reg_address =(uint8_t *) 0x87,206 .single_mask_address =(uint8_t *) 0x0a,207 .mode_address =(uint8_t *) 0x0b,208 .flip_flop_address =(uint8_t *) 0x0c,209 }, 210 { /* Channel 1 */211 .offset_reg_address =(uint8_t *) 0x02,212 .size_reg_address =(uint8_t *) 0x03,213 .page_reg_address =(uint8_t *) 0x83,214 .single_mask_address =(uint8_t *) 0x0a,215 .mode_address =(uint8_t *) 0x0b,216 .flip_flop_address =(uint8_t *) 0x0c,217 }, 218 { /* Channel 2 */219 .offset_reg_address =(uint8_t *) 0x04,220 .size_reg_address =(uint8_t *) 0x05,221 .page_reg_address =(uint8_t *) 0x81,222 .single_mask_address =(uint8_t *) 0x0a,223 .mode_address =(uint8_t *) 0x0b,224 .flip_flop_address =(uint8_t *) 0x0c,225 }, 226 { /* Channel 3 */227 .offset_reg_address =(uint8_t *) 0x06,228 .size_reg_address =(uint8_t *) 0x07,229 .page_reg_address =(uint8_t *) 0x82,230 .single_mask_address =(uint8_t *) 0x0a,231 .mode_address =(uint8_t *) 0x0b,232 .flip_flop_address =(uint8_t *) 0x0c,200 { 201 (uint8_t *) 0x00, 202 (uint8_t *) 0x01, 203 (uint8_t *) 0x87, 204 (uint8_t *) 0x0a, 205 (uint8_t *) 0x0b, 206 (uint8_t *) 0x0c, 207 }, 208 { 209 (uint8_t *) 0x02, 210 (uint8_t *) 0x03, 211 (uint8_t *) 0x83, 212 (uint8_t *) 0x0a, 213 (uint8_t *) 0x0b, 214 (uint8_t *) 0x0c, 215 }, 216 { 217 (uint8_t *) 0x04, 218 (uint8_t *) 0x05, 219 (uint8_t *) 0x81, 220 (uint8_t *) 0x0a, 221 (uint8_t *) 0x0b, 222 (uint8_t *) 0x0c, 223 }, 224 { 225 (uint8_t *) 0x06, 226 (uint8_t *) 0x07, 227 (uint8_t *) 0x82, 228 (uint8_t *) 0x0a, 229 (uint8_t *) 0x0b, 230 (uint8_t *) 0x0c, 233 231 }, 234 232 235 233 /* The second chip 16-bit */ 236 { /* Channel 4 - Unusable */237 .offset_reg_address =(uint8_t *) 0xc0,238 .size_reg_address =(uint8_t *) 0xc2,239 .page_reg_address =(uint8_t *) 0x8f,240 .single_mask_address =(uint8_t *) 0xd4,241 .mode_address =(uint8_t *) 0xd6,242 .flip_flop_address =(uint8_t *) 0xd8,243 }, 244 { /* Channel 5 */245 .offset_reg_address =(uint8_t *) 0xc4,246 .size_reg_address =(uint8_t *) 0xc6,247 .page_reg_address =(uint8_t *) 0x8b,248 .single_mask_address =(uint8_t *) 0xd4,249 .mode_address =(uint8_t *) 0xd6,250 .flip_flop_address =(uint8_t *) 0xd8,251 }, 252 { /* Channel 6 */253 .offset_reg_address =(uint8_t *) 0xc8,254 .size_reg_address =(uint8_t *) 0xca,255 .page_reg_address =(uint8_t *) 0x89,256 .single_mask_address =(uint8_t *) 0xd4,257 .mode_address =(uint8_t *) 0xd6,258 .flip_flop_address =(uint8_t *) 0xd8,259 }, 260 { /* Channel 7 */261 .offset_reg_address =(uint8_t *) 0xcc,262 .size_reg_address =(uint8_t *) 0xce,263 .page_reg_address =(uint8_t *) 0x8a,264 .single_mask_address =(uint8_t *) 0xd4,265 .mode_address =(uint8_t *) 0xd6,266 .flip_flop_address =(uint8_t *) 0xd8,234 { 235 (uint8_t *) 0xc0, 236 (uint8_t *) 0xc2, 237 (uint8_t *) 0x8f, 238 (uint8_t *) 0xd4, 239 (uint8_t *) 0xd6, 240 (uint8_t *) 0xd8, 241 }, 242 { 243 (uint8_t *) 0xc4, 244 (uint8_t *) 0xc6, 245 (uint8_t *) 0x8b, 246 (uint8_t *) 0xd4, 247 (uint8_t *) 0xd6, 248 (uint8_t *) 0xd8, 249 }, 250 { 251 (uint8_t *) 0xc8, 252 (uint8_t *) 0xca, 253 (uint8_t *) 0x89, 254 (uint8_t *) 0xd4, 255 (uint8_t *) 0xd6, 256 (uint8_t *) 0xd8, 257 }, 258 { 259 (uint8_t *) 0xcc, 260 (uint8_t *) 0xce, 261 (uint8_t *) 0x8a, 262 (uint8_t *) 0xd4, 263 (uint8_t *) 0xd6, 264 (uint8_t *) 0xd8, 267 265 }, 268 266 }, … … 274 272 }; 275 273 276 /* *Initialize I/O access to DMA controller I/O ports.274 /* Initialize I/O access to DMA controller I/O ports. 277 275 * 278 276 * @param controller DMA Controller structure to initialize. 279 277 * 280 278 * @return Error code. 279 * 281 280 */ 282 281 static inline int dma_controller_init(dma_controller_t *controller) … … 305 304 306 305 return EOK; 307 }308 309 /** Helper function. Channels 4,5,6, and 7 are 8 bit DMA.310 * @pram channel DMA channel.311 * @reutrn True, if channel is 4,5,6, or 7, false otherwise.312 */313 static inline bool is_dma16(unsigned channel)314 {315 return (channel >= 4) && (channel < 8);316 }317 318 /** Helper function. Channels 0,1,2, and 3 are 8 bit DMA.319 * @pram channel DMA channel.320 * @reutrn True, if channel is 0,1,2, or 3, false otherwise.321 */322 static inline bool is_dma8(unsigned channel)323 {324 return (channel < 4);325 306 } 326 307 … … 339 320 * 340 321 * @return Error code. 341 */ 342 int dma_channel_setup(unsigned int channel, uint32_t pa, uint16_t size, 322 * 323 */ 324 int dma_setup_channel(unsigned int channel, uint32_t pa, uint16_t size, 343 325 uint8_t mode) 344 326 { 345 if (!is_dma8(channel) && !is_dma16(channel))346 return ENOENT;347 348 327 if ((channel == 0) || (channel == 4)) 349 328 return ENOTSUP; 329 330 if (channel > 7) 331 return ENOENT; 350 332 351 333 /* DMA is limited to 24bit addresses. */ … … 354 336 355 337 /* 8 bit channels use only 4 bits from the page register. */ 356 if (is_dma8(channel) && (pa >= (1 << 20))) 357 return EINVAL; 358 359 /* Buffers cannot cross 64K page boundaries */ 360 if ((pa & 0xffff0000) != ((pa + size) & 0xffff0000)) 338 if ((channel > 0) && (channel < 4) && (pa >= (1 << 20))) 361 339 return EINVAL; 362 340 … … 374 352 ddf_msg(LVL_DEBUG, "Unspoiled address %#" PRIx32 " (size %" PRIu16 ")", 375 353 pa, size); 376 if ( is_dma16(channel)) {354 if (channel > 4) { 377 355 /* Size must be aligned to 16 bits */ 378 356 if ((size & 1) != 0) { … … 380 358 return EINVAL; 381 359 } 382 /* Size is in 2byte words */360 383 361 size >>= 1; 362 384 363 /* Address is fun: lower 16 bits need to be shifted by 1 */ 385 364 pa = ((pa & 0xffff) >> 1) | (pa & 0xff0000); … … 447 426 } 448 427 449 /** Query remaining buffer size.450 *451 * @param channel DMA Channel 1, 2, 3 for 8 bit transfers,452 * 5, 6, 7 for 16 bit.453 * @param size Place to store number of bytes pending in the assigned buffer.454 *455 * @return Error code.456 */457 int dma_channel_remain(unsigned channel, size_t *size)458 {459 assert(size);460 if (!is_dma8(channel) && !is_dma16(channel))461 return ENOENT;462 463 if ((channel == 0) || (channel == 4))464 return ENOTSUP;465 466 fibril_mutex_lock(&guard);467 if (!controller_8237.initialized) {468 fibril_mutex_unlock(&guard);469 return EIO;470 }471 472 const dma_channel_t dma_channel = controller_8237.channels[channel];473 /* Get size - reset flip-flop */474 pio_write_8(dma_channel.flip_flop_address, 0);475 476 /* Low byte */477 const uint8_t value_low = pio_read_8(dma_channel.size_reg_address);478 ddf_msg(LVL_DEBUG2, "Read size low byte: %p:%zx.",479 dma_channel.size_reg_address, value_low);480 481 /* High byte */482 const uint8_t value_high = pio_read_8(dma_channel.size_reg_address);483 ddf_msg(LVL_DEBUG2, "Read size high byte: %p:%zx.",484 dma_channel.size_reg_address, value_high);485 fibril_mutex_unlock(&guard);486 487 uint16_t remain = (value_high << 8 | value_low) ;488 /* 16 bit DMA size is in words,489 * the upper bits are bogus for 16bit transfers so we need to get490 * rid of them. Using limited type works well.*/491 if (is_dma16(channel))492 remain <<= 1;493 *size = is_dma16(channel) ? remain + 2: remain + 1;494 return EOK;495 }496 428 /** 497 429 * @} -
uspace/drv/bus/isa/i8237.h
rc6a7b3a r5d9fce4 38 38 #define DRV_BUS_ISA_I8237_H 39 39 40 extern int dma_channel_setup(unsigned, uint32_t, uint16_t, uint8_t); 41 extern int dma_channel_remain(unsigned, size_t *); 40 extern int dma_setup_channel(unsigned int, uint32_t, uint16_t, uint8_t); 42 41 43 42 #endif -
uspace/drv/bus/isa/isa.c
rc6a7b3a r5d9fce4 85 85 fibril_mutex_t mutex; 86 86 ddf_fun_t *fnode; 87 hw_resource_t resources[ISA_MAX_HW_RES];88 87 hw_resource_list_t hw_resources; 89 88 link_t bus_link; … … 104 103 static hw_resource_list_t *isa_get_fun_resources(ddf_fun_t *fnode) 105 104 { 106 isa_fun_t * isa= isa_fun(fnode);107 assert( isa);108 109 return & isa->hw_resources;110 } 111 112 static bool isa_ fun_enable_interrupt(ddf_fun_t *fnode)105 isa_fun_t *fun = isa_fun(fnode); 106 assert(fun != NULL); 107 108 return &fun->hw_resources; 109 } 110 111 static bool isa_enable_fun_interrupt(ddf_fun_t *fnode) 113 112 { 114 113 /* This is an old ugly way, copied from pci driver */ 115 114 assert(fnode); 116 isa_fun_t *isa = isa_fun(fnode); 117 assert(isa); 115 isa_fun_t *fun = isa_fun(fnode); 118 116 119 117 sysarg_t apic; … … 131 129 return false; 132 130 133 const hw_resource_list_t *res = & isa->hw_resources;131 const hw_resource_list_t *res = &fun->hw_resources; 134 132 assert(res); 135 133 for (size_t i = 0; i < res->count; ++i) { … … 153 151 } 154 152 155 static int isa_ fun_setup_dma(ddf_fun_t *fnode,153 static int isa_dma_channel_fun_setup(ddf_fun_t *fnode, 156 154 unsigned int channel, uint32_t pa, uint16_t size, uint8_t mode) 157 155 { 158 156 assert(fnode); 159 isa_fun_t *isa = isa_fun(fnode); 160 assert(isa); 161 const hw_resource_list_t *res = &isa->hw_resources; 157 isa_fun_t *fun = isa_fun(fnode); 158 const hw_resource_list_t *res = &fun->hw_resources; 162 159 assert(res); 163 160 161 const unsigned int ch = channel; 164 162 for (size_t i = 0; i < res->count; ++i) { 165 /* Check for assigned channel */166 163 if (((res->resources[i].type == DMA_CHANNEL_16) && 167 (res->resources[i].res.dma_channel.dma16 == ch annel)) ||164 (res->resources[i].res.dma_channel.dma16 == ch)) || 168 165 ((res->resources[i].type == DMA_CHANNEL_8) && 169 (res->resources[i].res.dma_channel.dma8 == ch annel))) {170 return dma_ channel_setup(channel, pa, size, mode);166 (res->resources[i].res.dma_channel.dma8 == ch))) { 167 return dma_setup_channel(channel, pa, size, mode); 171 168 } 172 169 } 173 174 return EINVAL; 175 } 176 177 static int isa_fun_remain_dma(ddf_fun_t *fnode, 178 unsigned channel, size_t *size) 179 { 180 assert(size); 181 assert(fnode); 182 isa_fun_t *isa = isa_fun(fnode); 183 assert(isa); 184 const hw_resource_list_t *res = &isa->hw_resources; 185 assert(res); 186 187 for (size_t i = 0; i < res->count; ++i) { 188 /* Check for assigned channel */ 189 if (((res->resources[i].type == DMA_CHANNEL_16) && 190 (res->resources[i].res.dma_channel.dma16 == channel)) || 191 ((res->resources[i].type == DMA_CHANNEL_8) && 192 (res->resources[i].res.dma_channel.dma8 == channel))) { 193 return dma_channel_remain(channel, size); 194 } 195 } 196 170 197 171 return EINVAL; 198 172 } … … 200 174 static hw_res_ops_t isa_fun_hw_res_ops = { 201 175 .get_resource_list = isa_get_fun_resources, 202 .enable_interrupt = isa_fun_enable_interrupt, 203 .dma_channel_setup = isa_fun_setup_dma, 204 .dma_channel_remain = isa_fun_remain_dma, 176 .enable_interrupt = isa_enable_fun_interrupt, 177 .dma_channel_setup = isa_dma_channel_fun_setup, 205 178 }; 206 179 207 static ddf_dev_ops_t isa_fun_ops= { 208 .interfaces[HW_RES_DEV_IFACE] = &isa_fun_hw_res_ops, 209 }; 180 static ddf_dev_ops_t isa_fun_ops; 210 181 211 182 static int isa_dev_add(ddf_dev_t *dev); … … 241 212 242 213 fibril_mutex_initialize(&fun->mutex); 243 fun->hw_resources.resources = fun->resources;244 245 214 fun->fnode = fnode; 246 215 return fun; … … 301 270 { 302 271 char *line = str; 303 *next = NULL;304 272 305 273 if (str == NULL) { 274 *next = NULL; 306 275 return NULL; 307 276 } … … 313 282 if (*str != '\0') { 314 283 *next = str + 1; 284 } else { 285 *next = NULL; 315 286 } 316 287 … … 339 310 /* Get the name part of the rest of the line. */ 340 311 strtok(line, ":"); 341 return line; 342 } 343 344 static inline const char *skip_spaces(const char *line) 312 313 /* Allocate output buffer. */ 314 size_t size = str_size(line) + 1; 315 char *name = malloc(size); 316 317 if (name != NULL) { 318 /* Copy the result to the output buffer. */ 319 str_cpy(name, size, line); 320 } 321 322 return name; 323 } 324 325 static inline char *skip_spaces(char *line) 345 326 { 346 327 /* Skip leading spaces. */ … … 351 332 } 352 333 353 static void isa_fun_ add_irq(isa_fun_t *fun, int irq)334 static void isa_fun_set_irq(isa_fun_t *fun, int irq) 354 335 { 355 336 size_t count = fun->hw_resources.count; … … 367 348 } 368 349 369 static void isa_fun_ add_dma(isa_fun_t *fun, int dma)350 static void isa_fun_set_dma(isa_fun_t *fun, int dma) 370 351 { 371 352 size_t count = fun->hw_resources.count; … … 400 381 } 401 382 402 static void isa_fun_ add_io_range(isa_fun_t *fun, size_t addr, size_t len)383 static void isa_fun_set_io_range(isa_fun_t *fun, size_t addr, size_t len) 403 384 { 404 385 size_t count = fun->hw_resources.count; … … 419 400 } 420 401 421 static void fun_parse_irq(isa_fun_t *fun, c onst char *val)402 static void fun_parse_irq(isa_fun_t *fun, char *val) 422 403 { 423 404 int irq = 0; … … 428 409 429 410 if (val != end) 430 isa_fun_add_irq(fun, irq); 431 } 432 433 static void fun_parse_dma(isa_fun_t *fun, const char *val) 434 { 411 isa_fun_set_irq(fun, irq); 412 } 413 414 static void fun_parse_dma(isa_fun_t *fun, char *val) 415 { 416 unsigned int dma = 0; 435 417 char *end = NULL; 436 418 437 419 val = skip_spaces(val); 438 const int dma =strtol(val, &end, 10);420 dma = (unsigned int) strtol(val, &end, 10); 439 421 440 422 if (val != end) 441 isa_fun_ add_dma(fun, dma);442 } 443 444 static void fun_parse_io_range(isa_fun_t *fun, c onst char *val)423 isa_fun_set_dma(fun, dma); 424 } 425 426 static void fun_parse_io_range(isa_fun_t *fun, char *val) 445 427 { 446 428 size_t addr, len; … … 459 441 return; 460 442 461 isa_fun_ add_io_range(fun, addr, len);462 } 463 464 static void get_match_id(char **id, c onst char *val)465 { 466 c onst char *end = val;443 isa_fun_set_io_range(fun, addr, len); 444 } 445 446 static void get_match_id(char **id, char *val) 447 { 448 char *end = val; 467 449 468 450 while (!isspace(*end)) … … 474 456 } 475 457 476 static void fun_parse_match_id(isa_fun_t *fun, c onst char *val)458 static void fun_parse_match_id(isa_fun_t *fun, char *val) 477 459 { 478 460 char *id = NULL; 461 int score = 0; 479 462 char *end = NULL; 463 int rc; 480 464 481 465 val = skip_spaces(val); 482 466 483 intscore = (int)strtol(val, &end, 10);467 score = (int)strtol(val, &end, 10); 484 468 if (val == end) { 485 469 ddf_msg(LVL_ERROR, "Cannot read match score for function " … … 499 483 "function %s", id, score, ddf_fun_get_name(fun->fnode)); 500 484 501 intrc = ddf_fun_add_match_id(fun->fnode, id, score);485 rc = ddf_fun_add_match_id(fun->fnode, id, score); 502 486 if (rc != EOK) { 503 487 ddf_msg(LVL_ERROR, "Failed adding match ID: %s", … … 508 492 } 509 493 510 static bool prop_parse(isa_fun_t *fun, c onst char *line, const char *prop,511 void (*read_fn)(isa_fun_t *, c onst char *))494 static bool prop_parse(isa_fun_t *fun, char *line, const char *prop, 495 void (*read_fn)(isa_fun_t *, char *)) 512 496 { 513 497 size_t proplen = str_size(prop); … … 524 508 } 525 509 526 static void fun_prop_parse(isa_fun_t *fun, c onst char *line)510 static void fun_prop_parse(isa_fun_t *fun, char *line) 527 511 { 528 512 /* Skip leading spaces. */ … … 539 523 } 540 524 525 static void fun_hw_res_alloc(isa_fun_t *fun) 526 { 527 fun->hw_resources.resources = 528 (hw_resource_t *) malloc(sizeof(hw_resource_t) * ISA_MAX_HW_RES); 529 } 530 531 static void fun_hw_res_free(isa_fun_t *fun) 532 { 533 free(fun->hw_resources.resources); 534 fun->hw_resources.resources = NULL; 535 } 536 541 537 static char *isa_fun_read_info(char *fun_conf, isa_bus_t *isa) 542 538 { 543 539 char *line; 540 char *fun_name = NULL; 544 541 545 542 /* Skip empty lines. */ 546 do{543 while (true) { 547 544 line = str_get_line(fun_conf, &fun_conf); 548 545 … … 552 549 } 553 550 554 } while (line_empty(line)); 551 if (!line_empty(line)) 552 break; 553 } 555 554 556 555 /* Get device name. */ 557 const char *fun_name = get_device_name(line);556 fun_name = get_device_name(line); 558 557 if (fun_name == NULL) 559 558 return NULL; 560 559 561 560 isa_fun_t *fun = isa_fun_create(isa, fun_name); 561 free(fun_name); 562 562 if (fun == NULL) { 563 563 return NULL; 564 564 } 565 566 /* Allocate buffer for the list of hardware resources of the device. */ 567 fun_hw_res_alloc(fun); 565 568 566 569 /* Get properties of the device (match ids, irq and io range). */ … … 593 596 } 594 597 595 static void isa_functions_add(isa_bus_t *isa) 596 { 597 char *conf = fun_conf_read(CHILD_FUN_CONF_PATH); 598 static void fun_conf_parse(char *conf, isa_bus_t *isa) 599 { 598 600 while (conf != NULL && *conf != '\0') { 599 601 conf = isa_fun_read_info(conf, isa); 600 602 } 601 free(conf); 603 } 604 605 static void isa_functions_add(isa_bus_t *isa) 606 { 607 char *fun_conf; 608 609 fun_conf = fun_conf_read(CHILD_FUN_CONF_PATH); 610 if (fun_conf != NULL) { 611 fun_conf_parse(fun_conf, isa); 612 free(fun_conf); 613 } 602 614 } 603 615 604 616 static int isa_dev_add(ddf_dev_t *dev) 605 617 { 618 isa_bus_t *isa; 619 606 620 ddf_msg(LVL_DEBUG, "isa_dev_add, device handle = %d", 607 621 (int) ddf_dev_get_handle(dev)); 608 622 609 isa _bus_t *isa= ddf_dev_data_alloc(dev, sizeof(isa_bus_t));623 isa = ddf_dev_data_alloc(dev, sizeof(isa_bus_t)); 610 624 if (isa == NULL) 611 625 return ENOMEM; … … 644 658 { 645 659 isa_bus_t *isa = isa_bus(dev); 660 int rc; 646 661 647 662 fibril_mutex_lock(&isa->mutex); … … 651 666 isa_fun_t, bus_link); 652 667 653 intrc = ddf_fun_offline(fun->fnode);668 rc = ddf_fun_offline(fun->fnode); 654 669 if (rc != EOK) { 655 670 fibril_mutex_unlock(&isa->mutex); … … 667 682 list_remove(&fun->bus_link); 668 683 684 fun_hw_res_free(fun); 669 685 ddf_fun_destroy(fun->fnode); 670 686 } … … 693 709 } 694 710 711 712 static void isa_init() 713 { 714 ddf_log_init(NAME); 715 isa_fun_ops.interfaces[HW_RES_DEV_IFACE] = &isa_fun_hw_res_ops; 716 } 717 695 718 int main(int argc, char *argv[]) 696 719 { 697 720 printf(NAME ": HelenOS ISA bus driver\n"); 698 ddf_log_init(NAME);721 isa_init(); 699 722 return ddf_driver_main(&isa_driver); 700 723 } -
uspace/drv/infrastructure/root/root.c
rc6a7b3a r5d9fce4 208 208 /* 209 209 * Register virtual devices root. 210 * We warn onerror occurrence because virtual devices shall not be210 * We ignore error occurrence because virtual devices shall not be 211 211 * vital for the system. 212 212 */ 213 int res = add_virtual_root_fun(dev); 214 if (res != EOK) 215 ddf_msg(LVL_WARN, "Failed to add virtual child."); 213 (void) add_virtual_root_fun(dev); 216 214 217 215 /* Register root device's children. */ 218 res = add_platform_fun(dev);216 int res = add_platform_fun(dev); 219 217 if (EOK != res) 220 218 ddf_msg(LVL_ERROR, "Failed adding child device for platform."); -
uspace/lib/c/generic/async.c
rc6a7b3a r5d9fce4 2279 2279 bool async_data_read_receive(ipc_callid_t *callid, size_t *size) 2280 2280 { 2281 assert(callid); 2282 2281 2283 ipc_call_t data; 2282 return async_data_read_receive_call(callid, &data, size); 2283 } 2284 2285 /** Wrapper for receiving the IPC_M_DATA_READ calls using the async framework. 2286 * 2287 * This wrapper only makes it more comfortable to receive IPC_M_DATA_READ 2288 * calls so that the user doesn't have to remember the meaning of each IPC 2289 * argument. 2290 * 2291 * So far, this wrapper is to be used from within a connection fibril. 2292 * 2293 * @param callid Storage for the hash of the IPC_M_DATA_READ. 2294 * @param size Storage for the maximum size. Can be NULL. 2295 * 2296 * @return True on success, false on failure. 2297 * 2298 */ 2299 bool async_data_read_receive_call(ipc_callid_t *callid, ipc_call_t *data, 2300 size_t *size) 2301 { 2302 assert(callid); 2303 assert(data); 2304 2305 *callid = async_get_call(data); 2306 2307 if (IPC_GET_IMETHOD(*data) != IPC_M_DATA_READ) 2284 *callid = async_get_call(&data); 2285 2286 if (IPC_GET_IMETHOD(data) != IPC_M_DATA_READ) 2308 2287 return false; 2309 2288 2310 2289 if (size) 2311 *size = (size_t) IPC_GET_ARG2( *data);2290 *size = (size_t) IPC_GET_ARG2(data); 2312 2291 2313 2292 return true; … … 2404 2383 bool async_data_write_receive(ipc_callid_t *callid, size_t *size) 2405 2384 { 2385 assert(callid); 2386 2406 2387 ipc_call_t data; 2407 return async_data_write_receive_call(callid, &data, size); 2408 } 2409 2410 /** Wrapper for receiving the IPC_M_DATA_WRITE calls using the async framework. 2411 * 2412 * This wrapper only makes it more comfortable to receive IPC_M_DATA_WRITE 2413 * calls so that the user doesn't have to remember the meaning of each IPC 2414 * argument. 2415 * 2416 * So far, this wrapper is to be used from within a connection fibril. 2417 * 2418 * @param callid Storage for the hash of the IPC_M_DATA_WRITE. 2419 * @param data Storage for the ipc call data. 2420 * @param size Storage for the suggested size. May be NULL. 2421 * 2422 * @return True on success, false on failure. 2423 * 2424 */ 2425 bool async_data_write_receive_call(ipc_callid_t *callid, ipc_call_t *data, 2426 size_t *size) 2427 { 2428 assert(callid); 2429 assert(data); 2430 2431 *callid = async_get_call(data); 2432 2433 if (IPC_GET_IMETHOD(*data) != IPC_M_DATA_WRITE) 2388 *callid = async_get_call(&data); 2389 2390 if (IPC_GET_IMETHOD(data) != IPC_M_DATA_WRITE) 2434 2391 return false; 2435 2392 2436 2393 if (size) 2437 *size = (size_t) IPC_GET_ARG2( *data);2394 *size = (size_t) IPC_GET_ARG2(data); 2438 2395 2439 2396 return true; -
uspace/lib/c/generic/device/hw_res.c
rc6a7b3a r5d9fce4 42 42 { 43 43 sysarg_t count = 0; 44 44 45 45 async_exch_t *exch = async_exchange_begin(sess); 46 if (exch == NULL)47 return ENOMEM;48 46 int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 49 47 HW_RES_GET_RESOURCE_LIST, &count); 50 48 51 49 if (rc != EOK) { 52 50 async_exchange_end(exch); 53 51 return rc; 54 52 } 55 53 56 54 size_t size = count * sizeof(hw_resource_t); 57 55 hw_resource_t *resources = (hw_resource_t *) malloc(size); … … 61 59 return ENOMEM; 62 60 } 63 61 64 62 rc = async_data_read_start(exch, resources, size); 65 63 async_exchange_end(exch); 66 64 67 65 if (rc != EOK) { 68 66 free(resources); 69 67 return rc; 70 68 } 71 69 72 70 hw_resources->resources = resources; 73 71 hw_resources->count = count; 74 72 75 73 return EOK; 76 74 } … … 79 77 { 80 78 async_exch_t *exch = async_exchange_begin(sess); 81 if (exch == NULL)82 return false;83 79 int rc = async_req_1_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE), 84 80 HW_RES_ENABLE_INTERRUPT); 85 81 async_exchange_end(exch); 86 82 87 83 return (rc == EOK); 88 }89 90 /**91 * Setup DMA channel to specified place and mode.92 * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.93 * @param pa Physical address of the buffer. Must be < 16MB for 16 bit and < 1MB94 * for 8 bit transfers.95 * @param size DMA buffer size, limited to 64K.96 * @param mode Mode of the DMA channel:97 * - Read or Write98 * - Allow automatic reset99 * - Use address decrement instead of increment100 * - Use SINGLE/BLOCK/ON DEMAND transfer mode101 * @return Error code.102 */103 int hw_res_dma_channel_setup(async_sess_t *sess,104 unsigned channel, uint32_t pa, uint16_t size, uint8_t mode)105 {106 async_exch_t *exch = async_exchange_begin(sess);107 if (exch == NULL)108 return ENOMEM;109 const uint32_t packed = size | (mode << 16);110 const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),111 HW_RES_DMA_CHANNEL_SETUP, channel, pa, packed);112 async_exchange_end(exch);113 114 return ret;115 }116 117 /**118 * Query remaining bytes in the buffer.119 * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.120 * @return Number of bytes remaining in the buffer(>=0) or error code(<0).121 */122 int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel)123 {124 async_exch_t *exch = async_exchange_begin(sess);125 if (exch == NULL)126 return ENOMEM;127 sysarg_t remain;128 const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),129 HW_RES_DMA_CHANNEL_REMAIN, channel, &remain);130 async_exchange_end(exch);131 if (ret == EOK)132 return remain;133 return ret;134 84 } 135 85 -
uspace/lib/c/generic/device/hw_res_parsed.c
rc6a7b3a r5d9fce4 38 38 #include <errno.h> 39 39 40 static void hw_res_parse_add_dma_channel(hw_res_list_parsed_t *out, 41 const hw_resource_t *res, int flags) 42 { 43 assert(res); 44 assert((res->type == DMA_CHANNEL_8) || (res->type == DMA_CHANNEL_16)); 45 46 const unsigned channel = (res->type == DMA_CHANNEL_8) ? 47 res->res.dma_channel.dma8 : res->res.dma_channel.dma16; 48 const size_t count = out->dma_channels.count; 49 const int keep_duplicit = flags & HW_RES_KEEP_DUPLICIT; 50 51 if (!keep_duplicit) { 52 for (size_t i = 0; i < count; ++i) { 53 if (out->dma_channels.channels[i] == channel) 54 return; 55 } 56 } 57 58 out->dma_channels.channels[count] = channel; 59 ++out->dma_channels.count; 60 } 61 62 static void hw_res_parse_add_irq(hw_res_list_parsed_t *out, 63 const hw_resource_t *res, int flags) 40 static void hw_res_parse_add_irq(hw_res_list_parsed_t *out, hw_resource_t *res, 41 int flags) 64 42 { 65 43 assert(res && (res->type == INTERRUPT)); … … 81 59 82 60 static void hw_res_parse_add_io_range(hw_res_list_parsed_t *out, 83 consthw_resource_t *res, int flags)61 hw_resource_t *res, int flags) 84 62 { 85 63 assert(res && (res->type == IO_RANGE)); … … 112 90 113 91 static void hw_res_parse_add_mem_range(hw_res_list_parsed_t *out, 114 consthw_resource_t *res, int flags)92 hw_resource_t *res, int flags) 115 93 { 116 94 assert(res && (res->type == MEM_RANGE)); … … 154 132 * 155 133 */ 156 int hw_res_list_parse( consthw_resource_list_t *hw_resources,134 int hw_res_list_parse(hw_resource_list_t *hw_resources, 157 135 hw_res_list_parsed_t *out, int flags) 158 136 { … … 163 141 hw_res_list_parsed_clean(out); 164 142 165 out->irqs.irqs = calloc(res_count, sizeof(int)); 166 out->dma_channels.channels = calloc(res_count, sizeof(int)); 167 out->io_ranges.ranges = calloc(res_count, sizeof(io_range_t)); 168 out->mem_ranges.ranges = calloc(res_count, sizeof(mem_range_t)); 169 if (!out->irqs.irqs || !out->dma_channels.channels || 170 !out->io_ranges.ranges || !out->mem_ranges.ranges) { 171 hw_res_list_parsed_clean(out); 172 return ENOMEM; 173 } 143 out->irqs.irqs = malloc(res_count * sizeof(int)); 144 out->io_ranges.ranges = malloc(res_count * sizeof(io_range_t)); 145 out->mem_ranges.ranges = malloc(res_count * sizeof(mem_range_t)); 174 146 175 147 for (size_t i = 0; i < res_count; ++i) { 176 consthw_resource_t *resource = &(hw_resources->resources[i]);177 148 hw_resource_t *resource = &(hw_resources->resources[i]); 149 178 150 switch (resource->type) { 179 151 case INTERRUPT: … … 186 158 hw_res_parse_add_mem_range(out, resource, flags); 187 159 break; 188 case DMA_CHANNEL_8:189 case DMA_CHANNEL_16:190 hw_res_parse_add_dma_channel(out, resource, flags);191 break;192 160 default: 193 hw_res_list_parsed_clean(out);194 161 return EINVAL; 195 162 } 196 163 } 197 164 198 165 return EOK; 199 166 }; -
uspace/lib/c/include/async.h
rc6a7b3a r5d9fce4 399 399 extern int async_data_read_start(async_exch_t *, void *, size_t); 400 400 extern bool async_data_read_receive(ipc_callid_t *, size_t *); 401 extern bool async_data_read_receive_call(ipc_callid_t *, ipc_call_t *, size_t *);402 401 extern int async_data_read_finalize(ipc_callid_t, const void *, size_t); 403 402 … … 438 437 extern int async_data_write_start(async_exch_t *, const void *, size_t); 439 438 extern bool async_data_write_receive(ipc_callid_t *, size_t *); 440 extern bool async_data_write_receive_call(ipc_callid_t *, ipc_call_t *, size_t *);441 439 extern int async_data_write_finalize(ipc_callid_t, void *, size_t); 442 440 -
uspace/lib/c/include/device/hw_res.h
rc6a7b3a r5d9fce4 53 53 HW_RES_ENABLE_INTERRUPT, 54 54 HW_RES_DMA_CHANNEL_SETUP, 55 HW_RES_DMA_CHANNEL_REMAIN,56 55 } hw_res_method_t; 57 56 … … 117 116 extern int hw_res_dma_channel_setup(async_sess_t *, unsigned int, uint32_t, 118 117 uint16_t, uint8_t); 119 extern int hw_res_dma_channel_remain(async_sess_t *, unsigned);120 118 121 119 #endif -
uspace/lib/c/include/device/hw_res_parsed.h
rc6a7b3a r5d9fce4 139 139 } 140 140 141 extern int hw_res_list_parse( 142 const hw_resource_list_t *, hw_res_list_parsed_t *, int); 141 extern int hw_res_list_parse(hw_resource_list_t *, hw_res_list_parsed_t *, int); 143 142 extern int hw_res_get_list_parsed(async_sess_t *, hw_res_list_parsed_t *, int); 144 143 -
uspace/lib/c/include/ipc/dev_iface.h
rc6a7b3a r5d9fce4 36 36 typedef enum { 37 37 HW_RES_DEV_IFACE = 0, 38 39 /** Audio device mixer interface */40 AUDIO_MIXER_IFACE,41 /** Audio device pcm buffer interface */42 AUDIO_PCM_BUFFER_IFACE,43 44 38 /** Character device interface */ 45 39 CHAR_DEV_IFACE, -
uspace/lib/c/include/macros.h
rc6a7b3a r5d9fce4 40 40 #define abs(a) ((a) >= 0 ? (a) : -(a)) 41 41 42 #define ARRAY_SIZE(array) (sizeof(array) / sizeof(array[0]))43 42 44 43 #define KiB2SIZE(kb) ((kb) << 10) -
uspace/lib/drv/Makefile
rc6a7b3a r5d9fce4 29 29 30 30 USPACE_PREFIX = ../.. 31 EXTRA_CFLAGS = -Iinclude -I$(LIBUSB_PREFIX)/include -I$(LIBPCM_PREFIX)/include31 EXTRA_CFLAGS = -Iinclude -I$(LIBUSB_PREFIX)/include 32 32 LIBRARY = libdrv 33 33 … … 38 38 generic/log.c \ 39 39 generic/logbuf.c \ 40 generic/remote_audio_mixer.c \41 generic/remote_audio_pcm.c \42 40 generic/remote_hw_res.c \ 43 41 generic/remote_char_dev.c \ -
uspace/lib/drv/generic/dev_iface.c
rc6a7b3a r5d9fce4 49 49 #include "remote_usbhid.h" 50 50 #include "remote_pci.h" 51 #include "remote_audio_mixer.h"52 #include "remote_audio_pcm.h"53 51 #include "remote_ahci.h" 54 52 55 static constiface_dipatch_table_t remote_ifaces = {53 static iface_dipatch_table_t remote_ifaces = { 56 54 .ifaces = { 57 [AUDIO_MIXER_IFACE] = &remote_audio_mixer_iface, 58 [AUDIO_PCM_BUFFER_IFACE] = &remote_audio_pcm_iface, 59 [HW_RES_DEV_IFACE] = &remote_hw_res_iface, 60 [CHAR_DEV_IFACE] = &remote_char_dev_iface, 61 [GRAPH_DEV_IFACE] = &remote_graph_dev_iface, 62 [NIC_DEV_IFACE] = &remote_nic_iface, 63 [PCI_DEV_IFACE] = &remote_pci_iface, 64 [USB_DEV_IFACE] = &remote_usb_iface, 65 [USBHC_DEV_IFACE] = &remote_usbhc_iface, 66 [USBHID_DEV_IFACE] = &remote_usbhid_iface, 67 [CLOCK_DEV_IFACE] = &remote_clock_dev_iface, 68 [BATTERY_DEV_IFACE] = &remote_battery_dev_iface, 69 [AHCI_DEV_IFACE] = &remote_ahci_iface, 55 &remote_hw_res_iface, 56 &remote_char_dev_iface, 57 &remote_graph_dev_iface, 58 &remote_nic_iface, 59 &remote_pci_iface, 60 &remote_usb_iface, 61 &remote_usbhc_iface, 62 &remote_usbhid_iface, 63 &remote_clock_dev_iface, 64 &remote_battery_dev_iface, 65 &remote_ahci_iface 70 66 } 71 67 }; -
uspace/lib/drv/generic/remote_hw_res.c
rc6a7b3a r5d9fce4 1 1 /* 2 2 * Copyright (c) 2010 Lenka Trochtova 3 * Copyright (c) 2011 Jan Vesely4 3 * All rights reserved. 5 4 * … … 44 43 static void remote_hw_res_enable_interrupt(ddf_fun_t *, void *, ipc_callid_t, 45 44 ipc_call_t *); 46 static void remote_hw_res_dma_channel_setup(ddf_fun_t *, void *, ipc_callid_t,47 ipc_call_t *);48 static void remote_hw_res_dma_channel_remain(ddf_fun_t *, void *, ipc_callid_t,49 ipc_call_t *);50 45 51 46 static remote_iface_func_ptr_t remote_hw_res_iface_ops [] = { 52 [HW_RES_GET_RESOURCE_LIST] = &remote_hw_res_get_resource_list, 53 [HW_RES_ENABLE_INTERRUPT] = &remote_hw_res_enable_interrupt, 54 [HW_RES_DMA_CHANNEL_SETUP] = &remote_hw_res_dma_channel_setup, 55 [HW_RES_DMA_CHANNEL_REMAIN] = &remote_hw_res_dma_channel_remain, 47 &remote_hw_res_get_resource_list, 48 &remote_hw_res_enable_interrupt 56 49 }; 57 50 … … 101 94 } 102 95 103 static void remote_hw_res_dma_channel_setup(ddf_fun_t *fun, void *ops,104 ipc_callid_t callid, ipc_call_t *call)105 {106 hw_res_ops_t *hw_res_ops = ops;107 108 if (hw_res_ops->dma_channel_setup == NULL) {109 async_answer_0(callid, ENOTSUP);110 return;111 }112 const unsigned channel = DEV_IPC_GET_ARG1(*call);113 const uint32_t address = DEV_IPC_GET_ARG2(*call);114 const uint16_t size = DEV_IPC_GET_ARG3(*call) & 0xffff;115 const uint8_t mode = DEV_IPC_GET_ARG3(*call) >> 16;116 117 const int ret = hw_res_ops->dma_channel_setup(118 fun, channel, address, size, mode);119 async_answer_0(callid, ret);120 }121 122 static void remote_hw_res_dma_channel_remain(ddf_fun_t *fun, void *ops,123 ipc_callid_t callid, ipc_call_t *call)124 {125 hw_res_ops_t *hw_res_ops = ops;126 127 if (hw_res_ops->dma_channel_setup == NULL) {128 async_answer_0(callid, ENOTSUP);129 return;130 }131 const unsigned channel = DEV_IPC_GET_ARG1(*call);132 size_t remain = 0;133 const int ret = hw_res_ops->dma_channel_remain(fun, channel, &remain);134 async_answer_1(callid, ret, remain);135 }136 96 /** 137 97 * @} -
uspace/lib/drv/include/ops/hw_res.h
rc6a7b3a r5d9fce4 45 45 bool (*enable_interrupt)(ddf_fun_t *); 46 46 int (*dma_channel_setup)(ddf_fun_t *, unsigned, uint32_t, uint16_t, uint8_t); 47 int (*dma_channel_remain)(ddf_fun_t *, unsigned, size_t *);48 47 } hw_res_ops_t; 49 48 -
uspace/srv/hid/compositor/compositor.c
rc6a7b3a r5d9fce4 2092 2092 /* Establish input bidirectional connection. */ 2093 2093 rc = input_connect(input_svc); 2094 if (rc != EOK) { 2095 printf("%s: Failed to connect to input service.\n", NAME); 2094 if (rc != EOK) 2096 2095 return rc; 2097 }2098 2096 2099 2097 /* Create viewports and connect them to visualizers. */ … … 2101 2099 rc = loc_category_get_id("visualizer", &cat_id, IPC_FLAG_BLOCKING); 2102 2100 if (rc != EOK) { 2103 printf("%s: Failed to get visualizer category.\n", NAME);2104 2101 input_disconnect(); 2105 2102 return -1; … … 2110 2107 rc = loc_category_get_svcs(cat_id, &svcs, &svcs_cnt); 2111 2108 if (rc != EOK || svcs_cnt == 0) { 2112 printf("%s: Failed to get visualizer category services.\n", NAME);2113 2109 input_disconnect(); 2114 2110 return -1; … … 2127 2123 2128 2124 if (list_empty(&viewport_list)) { 2129 printf("%s: Failed to get view ports.\n", NAME);2130 2125 input_disconnect(); 2131 2126 return -1; -
uspace/srv/locsrv/locsrv.c
rc6a7b3a r5d9fce4 1377 1377 categ_dir_add_cat(&cdir, cat); 1378 1378 1379 cat = category_new("audio-pcm");1380 categ_dir_add_cat(&cdir, cat);1381 1382 1379 return true; 1383 1380 }
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