Changeset 60f6b7c in mainline
- Timestamp:
- 2005-09-01T17:47:55Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 5a2e9bbb
- Parents:
- 38207b9
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/include/asm.h
r38207b9 r60f6b7c 53 53 void asm_delay_loop(__u32 t); 54 54 55 56 #define set_shadow_register(reg,val) {__u64 v = val; __asm__ volatile("mov r15 = %0;;\n""bsw.0;;\n""mov " #reg " = r15;;\n""bsw.1;;\n" : : "r" (v) : "r15" ); } 57 #define get_shadow_register(reg,val) {__u64 v ; __asm__ volatile("bsw.0;;\n" "mov r15 = r" #reg ";;\n" "bsw.1;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } 58 59 #define get_control_register(reg,val) {__u64 v ; __asm__ volatile("mov r15 = cr" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } 60 #define get_aplication_register(reg,val) {__u64 v ; __asm__ volatile("mov r15 = ar" #reg ";;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } 61 #define get_psr(val) {__u64 v ; __asm__ volatile("mov r15 = psr;;\n" "mov %0 = r15;;\n" : "=r" (v) : : "r15" ); val=v; } 62 63 55 64 #endif -
arch/ia64/src/cpu/cpu.c
r38207b9 r60f6b7c 2 2 #include <print.h> 3 3 #include <panic.h> 4 #include <arch/types.h> 4 5 5 6 extern int IVT; … … 14 15 15 16 int *p=&IVT; 17 18 volatile __u64 hlp,hlp2; 16 19 17 20 18 __asm__ ( 21 int psr = 0x2000; 22 23 __asm__ volatile ( 19 24 "mov r15 = %0;;" 20 25 "mov cr2 = r15;;" 26 "mov psr.l = %1;;" 21 27 : 22 : "r" (p) 28 : "r" (p), "r" (psr) 23 29 : "r15" 24 30 ); 31 32 33 34 /*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/ 35 __asm__ volatile ("bsw.1;;"); 36 25 37 26 38 } -
arch/ia64/src/interrupt_handler.c
r38207b9 r60f6b7c 30 30 31 31 #include <panic.h> 32 #include <print.h> 32 33 #include <arch/types.h> 34 #include <arch/asm.h> 35 36 extern __u64 REG_DUMP; 33 37 34 38 … … 48 52 49 53 54 #define cr_dump(r) {__u64 val; get_control_register(r,val); printf("cr"#r":%Q\n",val);} 55 #define ar_dump(r) {__u64 val; get_aplication_register(r,val); printf("ar"#r":%Q\n",val);} 56 50 57 void universal_handler(void); 51 58 void universal_handler(void) 52 59 { 53 __u64 i; 60 __u64 vector,psr; 61 __u64 *p; 62 int i; 63 64 65 get_shadow_register(16,vector); 54 66 55 __asm__ ( 56 "mov %0 = r12;;" 57 : "=r" (i) 58 : 59 : "r15" 60 ); 67 68 p=®_DUMP; 61 69 62 panic("\nException:%Q\n",i); 70 for(i=0;i<128;i+=2) printf("gr%d:%Q\tgr%d:%Q\n",i,p[i],i+1,p[i+1]); 71 72 73 cr_dump(0); 74 cr_dump(1); 75 cr_dump(2); 76 cr_dump(8); 77 cr_dump(16); 78 cr_dump(17); 79 cr_dump(19); 80 cr_dump(20); 81 cr_dump(21); 82 cr_dump(22); 83 cr_dump(23); 84 cr_dump(24); 85 cr_dump(25); 86 cr_dump(64); 87 cr_dump(65); 88 cr_dump(66); 89 cr_dump(67); 90 cr_dump(68); 91 cr_dump(69); 92 cr_dump(70); 93 cr_dump(71); 94 cr_dump(72); 95 cr_dump(73); 96 cr_dump(74); 97 cr_dump(80); 98 cr_dump(81); 99 100 ar_dump(0); 101 ar_dump(1); 102 ar_dump(2); 103 ar_dump(3); 104 ar_dump(4); 105 ar_dump(5); 106 ar_dump(6); 107 ar_dump(7); 108 ar_dump(16); 109 ar_dump(17); 110 ar_dump(18); 111 ar_dump(19); 112 ar_dump(21); 113 ar_dump(24); 114 ar_dump(25); 115 ar_dump(26); 116 ar_dump(27); 117 ar_dump(28); 118 ar_dump(29); 119 ar_dump(30); 120 ar_dump(32); 121 ar_dump(36); 122 ar_dump(40); 123 ar_dump(44); 124 ar_dump(64); 125 ar_dump(65); 126 ar_dump(66); 127 128 get_psr(psr); 129 130 printf("\nPSR:%Q\n",psr); 131 132 panic("\nException:%Q\n",vector); 63 133 } 64 134 -
arch/ia64/src/ivt.S
r38207b9 r60f6b7c 29 29 30 30 31 32 dump_gregs: 33 mov r16 = REG_DUMP;; 34 st8 [r16] = r0;; 35 add r16 = 8,r16 ;; 36 st8 [r16] = r1;; 37 add r16 = 8,r16 ;; 38 st8 [r16] = r2;; 39 add r16 = 8,r16 ;; 40 st8 [r16] = r3;; 41 add r16 = 8,r16 ;; 42 st8 [r16] = r4;; 43 add r16 = 8,r16 ;; 44 st8 [r16] = r5;; 45 add r16 = 8,r16 ;; 46 st8 [r16] = r6;; 47 add r16 = 8,r16 ;; 48 st8 [r16] = r7;; 49 add r16 = 8,r16 ;; 50 st8 [r16] = r8;; 51 add r16 = 8,r16 ;; 52 st8 [r16] = r9;; 53 add r16 = 8,r16 ;; 54 st8 [r16] = r10;; 55 add r16 = 8,r16 ;; 56 st8 [r16] = r11;; 57 add r16 = 8,r16 ;; 58 st8 [r16] = r12;; 59 add r16 = 8,r16 ;; 60 st8 [r16] = r13;; 61 add r16 = 8,r16 ;; 62 st8 [r16] = r14;; 63 add r16 = 8,r16 ;; 64 st8 [r16] = r15;; 65 add r16 = 8,r16 ;; 66 67 bsw.1;; 68 mov r15 = r16;; 69 bsw.0;; 70 st8 [r16] = r15;; 71 add r16 = 8,r16 ;; 72 bsw.1;; 73 mov r15 = r17;; 74 bsw.0;; 75 st8 [r16] = r15;; 76 add r16 = 8,r16 ;; 77 bsw.1;; 78 mov r15 = r18;; 79 bsw.0;; 80 st8 [r16] = r15;; 81 add r16 = 8,r16 ;; 82 bsw.1;; 83 mov r15 = r19;; 84 bsw.0;; 85 st8 [r16] = r15;; 86 add r16 = 8,r16 ;; 87 bsw.1;; 88 mov r15 = r20;; 89 bsw.0;; 90 st8 [r16] = r15;; 91 add r16 = 8,r16 ;; 92 bsw.1;; 93 mov r15 = r21;; 94 bsw.0;; 95 st8 [r16] = r15;; 96 add r16 = 8,r16 ;; 97 bsw.1;; 98 mov r15 = r22;; 99 bsw.0;; 100 st8 [r16] = r15;; 101 add r16 = 8,r16 ;; 102 bsw.1;; 103 mov r15 = r23;; 104 bsw.0;; 105 st8 [r16] = r15;; 106 add r16 = 8,r16 ;; 107 bsw.1;; 108 mov r15 = r24;; 109 bsw.0;; 110 st8 [r16] = r15;; 111 add r16 = 8,r16 ;; 112 bsw.1;; 113 mov r15 = r25;; 114 bsw.0;; 115 st8 [r16] = r15;; 116 add r16 = 8,r16 ;; 117 bsw.1;; 118 mov r15 = r26;; 119 bsw.0;; 120 st8 [r16] = r15;; 121 add r16 = 8,r16 ;; 122 bsw.1;; 123 mov r15 = r27;; 124 bsw.0;; 125 st8 [r16] = r15;; 126 add r16 = 8,r16 ;; 127 bsw.1;; 128 mov r15 = r28;; 129 bsw.0;; 130 st8 [r16] = r15;; 131 add r16 = 8,r16 ;; 132 bsw.1;; 133 mov r15 = r29;; 134 bsw.0;; 135 st8 [r16] = r15;; 136 add r16 = 8,r16 ;; 137 bsw.1;; 138 mov r15 = r30;; 139 bsw.0;; 140 st8 [r16] = r15;; 141 add r16 = 8,r16 ;; 142 bsw.1;; 143 mov r15 = r31;; 144 bsw.0;; 145 st8 [r16] = r15;; 146 add r16 = 8,r16 ;; 147 148 149 st8 [r16] = r32;; 150 add r16 = 8,r16 ;; 151 st8 [r16] = r33;; 152 add r16 = 8,r16 ;; 153 st8 [r16] = r34;; 154 add r16 = 8,r16 ;; 155 st8 [r16] = r35;; 156 add r16 = 8,r16 ;; 157 st8 [r16] = r36;; 158 add r16 = 8,r16 ;; 159 st8 [r16] = r37;; 160 add r16 = 8,r16 ;; 161 st8 [r16] = r38;; 162 add r16 = 8,r16 ;; 163 st8 [r16] = r39;; 164 add r16 = 8,r16 ;; 165 st8 [r16] = r40;; 166 add r16 = 8,r16 ;; 167 st8 [r16] = r41;; 168 add r16 = 8,r16 ;; 169 st8 [r16] = r42;; 170 add r16 = 8,r16 ;; 171 st8 [r16] = r43;; 172 add r16 = 8,r16 ;; 173 st8 [r16] = r44;; 174 add r16 = 8,r16 ;; 175 st8 [r16] = r45;; 176 add r16 = 8,r16 ;; 177 st8 [r16] = r46;; 178 add r16 = 8,r16 ;; 179 st8 [r16] = r47;; 180 add r16 = 8,r16 ;; 181 st8 [r16] = r48;; 182 add r16 = 8,r16 ;; 183 st8 [r16] = r49;; 184 add r16 = 8,r16 ;; 185 st8 [r16] = r50;; 186 add r16 = 8,r16 ;; 187 st8 [r16] = r51;; 188 add r16 = 8,r16 ;; 189 st8 [r16] = r52;; 190 add r16 = 8,r16 ;; 191 st8 [r16] = r53;; 192 add r16 = 8,r16 ;; 193 st8 [r16] = r54;; 194 add r16 = 8,r16 ;; 195 st8 [r16] = r55;; 196 add r16 = 8,r16 ;; 197 st8 [r16] = r56;; 198 add r16 = 8,r16 ;; 199 st8 [r16] = r57;; 200 add r16 = 8,r16 ;; 201 st8 [r16] = r58;; 202 add r16 = 8,r16 ;; 203 st8 [r16] = r59;; 204 add r16 = 8,r16 ;; 205 st8 [r16] = r60;; 206 add r16 = 8,r16 ;; 207 st8 [r16] = r61;; 208 add r16 = 8,r16 ;; 209 st8 [r16] = r62;; 210 add r16 = 8,r16 ;; 211 st8 [r16] = r63;; 212 add r16 = 8,r16 ;; 213 214 215 216 st8 [r16] = r64;; 217 add r16 = 8,r16 ;; 218 st8 [r16] = r65;; 219 add r16 = 8,r16 ;; 220 st8 [r16] = r66;; 221 add r16 = 8,r16 ;; 222 st8 [r16] = r67;; 223 add r16 = 8,r16 ;; 224 st8 [r16] = r68;; 225 add r16 = 8,r16 ;; 226 st8 [r16] = r69;; 227 add r16 = 8,r16 ;; 228 st8 [r16] = r70;; 229 add r16 = 8,r16 ;; 230 st8 [r16] = r71;; 231 add r16 = 8,r16 ;; 232 st8 [r16] = r72;; 233 add r16 = 8,r16 ;; 234 st8 [r16] = r73;; 235 add r16 = 8,r16 ;; 236 st8 [r16] = r74;; 237 add r16 = 8,r16 ;; 238 st8 [r16] = r75;; 239 add r16 = 8,r16 ;; 240 st8 [r16] = r76;; 241 add r16 = 8,r16 ;; 242 st8 [r16] = r77;; 243 add r16 = 8,r16 ;; 244 st8 [r16] = r78;; 245 add r16 = 8,r16 ;; 246 st8 [r16] = r79;; 247 add r16 = 8,r16 ;; 248 st8 [r16] = r80;; 249 add r16 = 8,r16 ;; 250 st8 [r16] = r81;; 251 add r16 = 8,r16 ;; 252 st8 [r16] = r82;; 253 add r16 = 8,r16 ;; 254 st8 [r16] = r83;; 255 add r16 = 8,r16 ;; 256 st8 [r16] = r84;; 257 add r16 = 8,r16 ;; 258 st8 [r16] = r85;; 259 add r16 = 8,r16 ;; 260 st8 [r16] = r86;; 261 add r16 = 8,r16 ;; 262 st8 [r16] = r87;; 263 add r16 = 8,r16 ;; 264 st8 [r16] = r88;; 265 add r16 = 8,r16 ;; 266 st8 [r16] = r89;; 267 add r16 = 8,r16 ;; 268 st8 [r16] = r90;; 269 add r16 = 8,r16 ;; 270 st8 [r16] = r91;; 271 add r16 = 8,r16 ;; 272 st8 [r16] = r92;; 273 add r16 = 8,r16 ;; 274 st8 [r16] = r93;; 275 add r16 = 8,r16 ;; 276 st8 [r16] = r94;; 277 add r16 = 8,r16 ;; 278 st8 [r16] = r95;; 279 add r16 = 8,r16 ;; 280 281 282 283 st8 [r16] = r96;; 284 add r16 = 8,r16 ;; 285 st8 [r16] = r97;; 286 add r16 = 8,r16 ;; 287 st8 [r16] = r98;; 288 add r16 = 8,r16 ;; 289 st8 [r16] = r99;; 290 add r16 = 8,r16 ;; 291 st8 [r16] = r100;; 292 add r16 = 8,r16 ;; 293 st8 [r16] = r101;; 294 add r16 = 8,r16 ;; 295 st8 [r16] = r102;; 296 add r16 = 8,r16 ;; 297 st8 [r16] = r103;; 298 add r16 = 8,r16 ;; 299 st8 [r16] = r104;; 300 add r16 = 8,r16 ;; 301 st8 [r16] = r105;; 302 add r16 = 8,r16 ;; 303 st8 [r16] = r106;; 304 add r16 = 8,r16 ;; 305 st8 [r16] = r107;; 306 add r16 = 8,r16 ;; 307 st8 [r16] = r108;; 308 add r16 = 8,r16 ;; 309 st8 [r16] = r109;; 310 add r16 = 8,r16 ;; 311 st8 [r16] = r110;; 312 add r16 = 8,r16 ;; 313 st8 [r16] = r111;; 314 add r16 = 8,r16 ;; 315 st8 [r16] = r112;; 316 add r16 = 8,r16 ;; 317 st8 [r16] = r113;; 318 add r16 = 8,r16 ;; 319 st8 [r16] = r114;; 320 add r16 = 8,r16 ;; 321 st8 [r16] = r115;; 322 add r16 = 8,r16 ;; 323 st8 [r16] = r116;; 324 add r16 = 8,r16 ;; 325 st8 [r16] = r117;; 326 add r16 = 8,r16 ;; 327 st8 [r16] = r118;; 328 add r16 = 8,r16 ;; 329 st8 [r16] = r119;; 330 add r16 = 8,r16 ;; 331 st8 [r16] = r120;; 332 add r16 = 8,r16 ;; 333 st8 [r16] = r121;; 334 add r16 = 8,r16 ;; 335 st8 [r16] = r122;; 336 add r16 = 8,r16 ;; 337 st8 [r16] = r123;; 338 add r16 = 8,r16 ;; 339 st8 [r16] = r124;; 340 add r16 = 8,r16 ;; 341 st8 [r16] = r125;; 342 add r16 = 8,r16 ;; 343 st8 [r16] = r126;; 344 add r16 = 8,r16 ;; 345 st8 [r16] = r127;; 346 add r16 = 8,r16 ;; 347 348 349 350 br.ret.sptk.many b0;; 351 352 353 354 355 31 356 .macro Handler o h 32 357 .org IVT + \o … … 36 361 .macro Handler2 o 37 362 .org IVT + \o 38 mov r12 = \o 363 br.call.sptk.many b0 = dump_gregs;; 364 mov r16 = \o ;; 365 bsw.1;; 39 366 br universal_handler;; 40 367 .endm … … 72 399 Handler2 0x5200 73 400 Handler2 0x5300 74 Handler 0x5400 general_exception 401 #Handler 0x5400 general_exception 402 Handler2 0x5400 75 403 Handler2 0x5500 76 404 Handler2 0x5600 … … 127 455 128 456 .align 32768 129 .byte 0 457 .global REG_DUMP 458 459 REG_DUMP: 460 .space 128*8 461 -
src/main/main.c
r38207b9 r60f6b7c 133 133 void main_bsp_separated_stack(void) 134 134 { 135 136 int a;137 135 vm_t *m; 138 136 task_t *k;
Note:
See TracChangeset
for help on using the changeset viewer.