Changeset 623b49f1 in mainline
- Timestamp:
- 2007-01-29T19:22:04Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 1004b37
- Parents:
- 7d07bf3
- Location:
- kernel
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/include/smp/smp.h
r7d07bf3 r623b49f1 44 44 bool (*cpu_bootstrap)(index_t i); /**< Check whether the processor of index i is BSP. */ 45 45 uint8_t (*cpu_apic_id)(index_t i); /**< Return APIC ID of the processor of index i. */ 46 int (*irq_to_pin)( int irq); /**< Return mapping between irq and APIC pin. */46 int (*irq_to_pin)(unsigned int irq); /**< Return mapping between irq and APIC pin. */ 47 47 }; 48 48 49 extern int smp_irq_to_pin( int irq);49 extern int smp_irq_to_pin(unsigned int irq); 50 50 51 51 #endif -
kernel/arch/ia32/src/smp/apic.c
r7d07bf3 r623b49f1 147 147 { 148 148 io_apic_id_t idreg; 149 int i;149 unsigned int i; 150 150 151 151 exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious); … … 173 173 174 174 if ((pin = smp_irq_to_pin(i)) != -1) 175 io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE +i, LOPRI);175 io_apic_change_ioredtbl(pin, DEST_ALL, IVT_IRQBASE + i, LOPRI); 176 176 } 177 177 … … 535 535 { 536 536 io_redirection_reg_t reg; 537 int i, pin; 538 539 for (i=0;i<16;i++) { 540 if (irqmask & (1<<i)) { 537 unsigned int i; 538 int pin; 539 540 for (i = 0; i < 16; i++) { 541 if (irqmask & (1 << i)) { 541 542 /* 542 543 * Mask the signal input in IO APIC if there is a … … 545 546 pin = smp_irq_to_pin(i); 546 547 if (pin != -1) { 547 reg.lo = io_apic_read(IOREDTBL + pin *2);548 reg.lo = io_apic_read(IOREDTBL + pin * 2); 548 549 reg.masked = true; 549 io_apic_write(IOREDTBL + pin *2, reg.lo);550 io_apic_write(IOREDTBL + pin * 2, reg.lo); 550 551 } 551 552 … … 560 561 void io_apic_enable_irqs(uint16_t irqmask) 561 562 { 562 int i, pin; 563 unsigned int i; 564 int pin; 563 565 io_redirection_reg_t reg; 564 566 565 for (i =0;i<16;i++) {566 if (irqmask & (1 <<i)) {567 for (i = 0;i < 16; i++) { 568 if (irqmask & (1 << i)) { 567 569 /* 568 570 * Unmask the signal input in IO APIC if there is a … … 571 573 pin = smp_irq_to_pin(i); 572 574 if (pin != -1) { 573 reg.lo = io_apic_read(IOREDTBL + pin *2);575 reg.lo = io_apic_read(IOREDTBL + pin * 2); 574 576 reg.masked = false; 575 io_apic_write(IOREDTBL + pin *2, reg.lo);577 io_apic_write(IOREDTBL + pin * 2, reg.lo); 576 578 } 577 579 -
kernel/arch/ia32/src/smp/mps.c
r7d07bf3 r623b49f1 91 91 static bool is_bsp(index_t i); 92 92 static uint8_t get_cpu_apic_id(index_t i); 93 static int mps_irq_to_pin( int irq);93 static int mps_irq_to_pin(unsigned int irq); 94 94 95 95 struct smp_config_operations mps_config_operations = { … … 414 414 } 415 415 416 int mps_irq_to_pin( int irq)416 int mps_irq_to_pin(unsigned int irq) 417 417 { 418 418 unsigned int i; 419 419 420 for (i = 0; i < io_intr_entry_cnt; i++) {420 for (i = 0; i < io_intr_entry_cnt; i++) { 421 421 if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0) 422 422 return io_intr_entries[i].dst_io_apic_pin; -
kernel/arch/ia32/src/smp/smp.c
r7d07bf3 r623b49f1 171 171 } 172 172 173 int smp_irq_to_pin( int irq)173 int smp_irq_to_pin(unsigned int irq) 174 174 { 175 175 ASSERT(ops != NULL); -
kernel/arch/ia32xen/src/smp/apic.c
r7d07bf3 r623b49f1 125 125 { 126 126 io_apic_id_t idreg; 127 int i;127 unsigned int i; 128 128 129 129 exc_register(VECTOR_APIC_SPUR, "apic_spurious", (iroutine) apic_spurious); … … 529 529 { 530 530 io_redirection_reg_t reg; 531 int i, pin; 532 533 for (i=0;i<16;i++) { 534 if (irqmask & (1<<i)) { 531 unsigned int i; 532 int pin; 533 534 for (i = 0; i < 16; i++) { 535 if (irqmask & (1 << i)) { 535 536 /* 536 537 * Mask the signal input in IO APIC if there is a … … 554 555 void io_apic_enable_irqs(uint16_t irqmask) 555 556 { 556 int i, pin; 557 unsigned int i; 558 int pin; 557 559 io_redirection_reg_t reg; 558 560 559 for (i =0;i<16;i++) {560 if (irqmask & (1 <<i)) {561 for (i = 0; i < 16; i++) { 562 if (irqmask & (1 << i)) { 561 563 /* 562 564 * Unmask the signal input in IO APIC if there is a -
kernel/arch/ia32xen/src/smp/mps.c
r7d07bf3 r623b49f1 93 93 static bool is_bsp(index_t i); 94 94 static uint8_t get_cpu_apic_id(index_t i); 95 static int mps_irq_to_pin( int irq);95 static int mps_irq_to_pin(unsigned int irq); 96 96 97 97 struct smp_config_operations mps_config_operations = { … … 416 416 } 417 417 418 int mps_irq_to_pin( int irq)418 int mps_irq_to_pin(unsigned int irq) 419 419 { 420 420 int i; 421 421 422 for (i=0;i<io_intr_entry_cnt;i++) {422 for (i = 0; i < io_intr_entry_cnt; i++) { 423 423 if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0) 424 424 return io_intr_entries[i].dst_io_apic_pin; -
kernel/arch/ia32xen/src/smp/smp.c
r7d07bf3 r623b49f1 163 163 } 164 164 165 int smp_irq_to_pin( int irq)165 int smp_irq_to_pin(unsigned int irq) 166 166 { 167 167 ASSERT(ops != NULL); -
kernel/genarch/src/acpi/madt.c
r7d07bf3 r623b49f1 70 70 71 71 struct madt_apic_header * * madt_entries_index = NULL; 72 int madt_entries_index_cnt = 0;72 unsigned int madt_entries_index_cnt = 0; 73 73 74 74 char *entry[] = { … … 91 91 static bool madt_cpu_bootstrap(index_t i); 92 92 static uint8_t madt_cpu_apic_id(index_t i); 93 static int madt_irq_to_pin( int irq);93 static int madt_irq_to_pin(unsigned int irq); 94 94 95 95 struct smp_config_operations madt_config_operations = { … … 125 125 } 126 126 127 int madt_irq_to_pin( int irq)127 int madt_irq_to_pin(unsigned int irq) 128 128 { 129 129 ASSERT(irq < sizeof(isa_irq_map)/sizeof(int)); … … 144 144 struct madt_apic_header *h; 145 145 146 146 l_apic = (uint32_t *) (unative_t) acpi_madt->l_apic_address; 147 147 148 148 /* calculate madt entries */ … … 165 165 qsort(madt_entries_index, madt_entries_index_cnt, sizeof(uintptr_t), &madt_cmp); 166 166 167 /* Parse MADT entries */ 168 for (index = 0; index < madt_entries_index_cnt - 1; index++) { 169 h = madt_entries_index[index]; 170 switch (h->type) { 171 case MADT_L_APIC: 172 madt_l_apic_entry((struct madt_l_apic *) h, index); 173 break; 174 case MADT_IO_APIC: 175 madt_io_apic_entry((struct madt_io_apic *) h, index); 176 break; 177 case MADT_INTR_SRC_OVRD: 178 madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index); 179 break; 180 case MADT_NMI_SRC: 181 case MADT_L_APIC_NMI: 182 case MADT_L_APIC_ADDR_OVRD: 183 case MADT_IO_SAPIC: 184 case MADT_L_SAPIC: 185 case MADT_PLATFORM_INTR_SRC: 186 printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type); 187 break; 188 189 default: 190 if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) { 191 printf("MADT: skipping reserved entry (type=%zd)\n", h->type); 192 } 193 if (h->type >= MADT_RESERVED_OEM_BEGIN) { 194 printf("MADT: skipping OEM entry (type=%zd)\n", h->type); 195 } 196 break; 167 /* Parse MADT entries */ 168 if (madt_entries_index_cnt > 0) { 169 for (index = 0; index < madt_entries_index_cnt - 1; index++) { 170 h = madt_entries_index[index]; 171 switch (h->type) { 172 case MADT_L_APIC: 173 madt_l_apic_entry((struct madt_l_apic *) h, index); 174 break; 175 case MADT_IO_APIC: 176 madt_io_apic_entry((struct madt_io_apic *) h, index); 177 break; 178 case MADT_INTR_SRC_OVRD: 179 madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index); 180 break; 181 case MADT_NMI_SRC: 182 case MADT_L_APIC_NMI: 183 case MADT_L_APIC_ADDR_OVRD: 184 case MADT_IO_SAPIC: 185 case MADT_L_SAPIC: 186 case MADT_PLATFORM_INTR_SRC: 187 printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type); 188 break; 189 190 default: 191 if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) { 192 printf("MADT: skipping reserved entry (type=%zd)\n", h->type); 193 } 194 if (h->type >= MADT_RESERVED_OEM_BEGIN) { 195 printf("MADT: skipping OEM entry (type=%zd)\n", h->type); 196 } 197 break; 198 } 197 199 } 198 199 200 } 201 200 } 202 201 203 202 if (cpu_count)
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