Changeset 6767c1d in mainline


Ignore:
Timestamp:
2006-09-01T13:33:03Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9314ee1
Parents:
ed166f7
Message:

Convert sparc64 traps using SIMPLE_HANDLER to using PREEMPTIBLE_HANDLER.

Location:
kernel/arch/sparc64
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/include/trap/exception.h

    red166f7 r6767c1d  
    4343
    4444#ifndef __ASM__
    45 extern void do_instruction_access_exc(void);
    46 extern void do_mem_address_not_aligned(void);
    47 extern void do_data_access_error(void);
    48 extern void do_illegal_instruction(void);
     45
     46#include <typedefs.h>
     47
     48extern void do_instruction_access_exc(int n, istate_t *istate);
     49extern void do_mem_address_not_aligned(int n, istate_t *istate);
     50extern void do_data_access_error(int n, istate_t *istate);
     51extern void do_illegal_instruction(int n, istate_t *istate);
     52
    4953#endif /* !__ASM__ */
    5054
     
    5357/** @}
    5458 */
    55 
  • kernel/arch/sparc64/include/trap/interrupt.h

    red166f7 r6767c1d  
    9090
    9191#ifndef __ASM__
    92 extern void interrupt(void);
     92extern void interrupt(int n, istate_t *istate);
    9393#endif /* !def __ASM__ */
    9494
  • kernel/arch/sparc64/include/trap/mmu.h

    red166f7 r6767c1d  
    5454
    5555.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
    56         !
    57         ! First, try to refill TLB from TSB.
    58         !
     56        /*
     57         * First, try to refill TLB from TSB.
     58         */
    5959        ! TODO
    6060
  • kernel/arch/sparc64/include/trap/trap_table.h

    red166f7 r6767c1d  
    101101.endm
    102102
    103 .macro SIMPLE_HANDLER f
    104         call \f
    105         nop
    106 .endm
    107103#endif /* __ASM__ */
    108104
  • kernel/arch/sparc64/src/trap/exception.c

    red166f7 r6767c1d  
    3535
    3636#include <arch/trap/exception.h>
     37#include <arch/interrupt.h>
    3738#include <arch/asm.h>
    3839#include <debug.h>
     40#include <typedefs.h>
    3941
    4042/** Handle instruction_access_exception. */
    41 void do_instruction_access_exc(void)
     43void do_instruction_access_exc(int n, istate_t *istate)
    4244{
    43         panic("Instruction Access Exception\n");
     45        panic("Instruction Access Exception at %p.\n", istate->tpc);
    4446}
    4547
    4648/** Handle mem_address_not_aligned. */
    47 void do_mem_address_not_aligned(void)
     49void do_mem_address_not_aligned(int n, istate_t *istate)
    4850{
    49         panic("Memory Address Not Aligned\n");
     51        panic("Memory Address Not Aligned from %p.\n", istate->tpc);
    5052}
    5153
    5254/** Handle data_access_error. */
    53 void do_data_access_error(void)
     55void do_data_access_error(int n, istate_t *istate)
    5456{
    55         panic("Data Access Error: %p\n", tpc_read());
     57        panic("Data Access Error from %p.\n", istate->tpc);
    5658}
    5759
    5860/** Handle mem_address_not_aligned. */
    59 void do_illegal_instruction(void)
     61void do_illegal_instruction(int n, istate_t *istate)
    6062{
    61         panic("Illegal Instruction: %p\n", tpc_read());
     63        panic("Illegal Instruction at %p.\n", istate->tpc);
    6264}
    6365
  • kernel/arch/sparc64/src/trap/interrupt.c

    red166f7 r6767c1d  
    3737#include <interrupt.h>
    3838#include <arch/drivers/fhc.h>
     39#include <typedefs.h>
    3940#include <arch/types.h>
    4041#include <debug.h>
     
    6566}
    6667
    67 void interrupt(void)
     68void interrupt(int n, istate_t *istate)
    6869{
    6970        uint64_t intrcv;
  • kernel/arch/sparc64/src/trap/trap_table.S

    red166f7 r6767c1d  
    6060.global instruction_access_exception
    6161instruction_access_exception:
    62         SIMPLE_HANDLER do_instruction_access_exc
     62        PREEMPTIBLE_HANDLER do_instruction_access_exc
    6363
    6464/* TT = 0x10, TL = 0, illegal_instruction */
     
    6666.global illegal_instruction
    6767illegal_instruction:
    68         SIMPLE_HANDLER do_illegal_instruction
     68        PREEMPTIBLE_HANDLER do_illegal_instruction
    6969
    7070/* TT = 0x24, TL = 0, clean_window handler */
     
    7878.global data_access_error
    7979data_access_error:
    80         SIMPLE_HANDLER do_data_access_error
     80        PREEMPTIBLE_HANDLER do_data_access_error
    8181
    8282/* TT = 0x34, TL = 0, mem_address_not_aligned */
     
    8484.global mem_address_not_aligned
    8585mem_address_not_aligned:
    86         SIMPLE_HANDLER do_mem_address_not_aligned
     86        PREEMPTIBLE_HANDLER do_mem_address_not_aligned
    8787
    8888/* TT = 0x41, TL = 0, interrupt_level_1 handler */
     
    238238.global instruction_access_exception_high
    239239instruction_access_exception_high:
    240         SIMPLE_HANDLER do_instruction_access_exc
     240        PREEMPTIBLE_HANDLER do_instruction_access_exc
    241241
    242242/* TT = 0x10, TL > 0, illegal_instruction */
     
    244244.global illegal_instruction_high
    245245illegal_instruction_high:
    246         SIMPLE_HANDLER do_illegal_instruction
     246        PREEMPTIBLE_HANDLER do_illegal_instruction
    247247
    248248/* TT = 0x24, TL > 0, clean_window handler */
     
    256256.global data_access_error_high
    257257data_access_error_high:
    258         SIMPLE_HANDLER do_data_access_error
     258        PREEMPTIBLE_HANDLER do_data_access_error
    259259
    260260/* TT = 0x34, TL > 0, mem_address_not_aligned */
     
    262262.global mem_address_not_aligned_high
    263263mem_address_not_aligned_high:
    264         SIMPLE_HANDLER do_mem_address_not_aligned
     264        PREEMPTIBLE_HANDLER do_mem_address_not_aligned
    265265
    266266/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
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