Changes in kernel/arch/ia32/include/interrupt.h [598f90e:676afa2] in mainline
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kernel/arch/ia32/include/interrupt.h
r598f90e r676afa2 37 37 38 38 #include <typedefs.h> 39 #include <arch/istate.h>40 39 #include <arch/pm.h> 40 #include <trace.h> 41 41 42 42 #define IVT_ITEMS IDT_ITEMS … … 71 71 #define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) 72 72 73 typedef struct istate { 74 /* 75 * The strange order of the GPRs is given by the requirement to use the 76 * istate structure for both regular interrupts and exceptions as well 77 * as for syscall handlers which use this order as an optimization. 78 */ 79 uint32_t edx; 80 uint32_t ecx; 81 uint32_t ebx; 82 uint32_t esi; 83 uint32_t edi; 84 uint32_t ebp; 85 uint32_t eax; 86 87 uint32_t ebp_frame; /* imitation of frame pointer linkage */ 88 uint32_t eip_frame; /* imitation of return address linkage */ 89 90 uint32_t gs; 91 uint32_t fs; 92 uint32_t es; 93 uint32_t ds; 94 95 uint32_t error_word; /* real or fake error word */ 96 uint32_t eip; 97 uint32_t cs; 98 uint32_t eflags; 99 uint32_t esp; /* only if istate_t is from uspace */ 100 uint32_t ss; /* only if istate_t is from uspace */ 101 } istate_t; 102 103 /** Return true if exception happened while in userspace */ 104 NO_TRACE static inline int istate_from_uspace(istate_t *istate) 105 { 106 return !(istate->eip & 0x80000000); 107 } 108 109 NO_TRACE static inline void istate_set_retaddr(istate_t *istate, 110 uintptr_t retaddr) 111 { 112 istate->eip = retaddr; 113 } 114 115 NO_TRACE static inline unative_t istate_get_pc(istate_t *istate) 116 { 117 return istate->eip; 118 } 119 120 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate) 121 { 122 return istate->ebp; 123 } 124 73 125 extern void (* disable_irqs_function)(uint16_t); 74 126 extern void (* enable_irqs_function)(uint16_t);
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