Changeset 69a5600 in mainline for arch/ia32/src/proc/scheduler.c


Ignore:
Timestamp:
2006-04-29T11:32:44Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
2382d09
Parents:
429ff2ea
Message:

I/O Permission bitmap fixes. The trailing all-one sequence must be 8 bits long.
Update TSS limit in a proper way.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • arch/ia32/src/proc/scheduler.c

    r429ff2ea r69a5600  
    6262                bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
    6363                /*
    64                  * It is safe to set the trailing four bits because of the extra
     64                 * It is safe to set the trailing eight bits because of the extra
    6565                 * convenience byte in TSS_IOMAP_SIZE.
    6666                 */
    67                 bitmap_set_range(&iomap, TASK->arch.iomap.bits, 4);
     67                bitmap_set_range(&iomap, TASK->arch.iomap.bits, 8);
    6868        }
    6969        spinlock_unlock(&TASK->lock);
     
    7474        gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits) - 1);
    7575        gdtr_load(&cpugdtr);
     76
     77        /*
     78         * Before we load new TSS limit, the current TSS descriptor
     79         * type must be changed to describe inactive TSS.
     80         */
     81        gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
     82        tr_load(selector(TSS_DES));
    7683}
    7784
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