Changeset 6b781c0 in mainline


Ignore:
Timestamp:
2007-06-08T15:02:49Z (18 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
c03ee1c
Parents:
3ee8a075
Message:

Merge arm32 into trunk.

Files:
39 added
79 edited
1 moved

Legend:

Unmodified
Added
Removed
  • HelenOS.config

    r3ee8a075 r6b781c0  
    2020@ "indy" Sgi Indy
    2121! [PLATFORM=mips32] MACHINE (choice)
     22
     23# Machine
     24@ "gxemul_testarm" GXEmul testarm
     25! [PLATFORM=arm32] MACHINE (choice)
    2226
    2327# Compiler
  • boot/arch/arm32/Makefile.inc

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2007 Jakub Jermar
     2# Copyright (c) 2006 Martin Decky
    33# All rights reserved.
    44#
     
    2727#
    2828
    29 #
    30 # So far, this is just a placeholder.
    31 #
     29build: $(BASE)/image.boot
     30
     31$(BASE)/image.boot: depend arch/$(ARCH)/loader/image.boot
     32        cp arch/$(ARCH)/loader/image.boot $(BASE)/image.boot
     33
     34depend:
     35        -rm arch/$(ARCH)/loader/image.boot
     36
     37arch/$(ARCH)/loader/image.boot:
     38        make -C arch/$(ARCH)/loader COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
     39
     40clean:
     41        make -C arch/$(ARCH)/loader clean COMPILER=$(COMPILER) KERNELDIR=../../../$(KERNELDIR) USPACEDIR=../../../$(USPACEDIR) IMAGE=$(IMAGE)
     42        -rm -f $(BASE)/image.boot
  • boot/boot.config

    r3ee8a075 r6b781c0  
    5050@ "ecoff" Ecoff image (GXEmul)
    5151! [ARCH=mips32] IMAGE (choice)
     52
  • boot/generic/align.h

    r3ee8a075 r6b781c0  
    2727 */
    2828
     29/** @addtogroup generic
     30 * @{
     31 */
     32/** @file
     33 */
     34
    2935#ifndef BOOT_ALIGN_H_
    3036#define BOOT_ALIGN_H_
     
    3844
    3945#endif
     46
     47/** @}
     48 */
  • boot/generic/gentypes.h

    r3ee8a075 r6b781c0  
    2727 */
    2828
     29/** @addtogroup generic
     30 * @{
     31 */
     32/** @file
     33 */
     34
    2935#ifndef BOOT_GENTYPES_H_
    3036#define BOOT_GENTYPES_H_
     
    3743
    3844#endif
     45
     46/** @}
     47 */
  • boot/generic/printf.c

    r3ee8a075 r6b781c0  
    2727 */
    2828
     29/** @addtogroup generic
     30 * @{
     31 */
     32/** @file
     33 */
     34
    2935#include "printf.h"
    3036#include "stdarg.h"
     
    242248        va_end(ap);
    243249}
     250
     251/** @}
     252 */
  • boot/generic/printf.h

    r3ee8a075 r6b781c0  
    2727 */
    2828
     29/** @addtogroup generic
     30 * @{
     31 */
     32/** @file
     33 */
     34
    2935#ifndef BOOT_PRINTF_H_
    3036#define BOOT_PRINTF_H_
     
    4147
    4248#endif
     49
     50/** @}
     51 */
  • boot/generic/stdarg.h

    r3ee8a075 r6b781c0  
    2727 */
    2828
     29/** @addtogroup generic
     30 * @{
     31 */
     32/** @file
     33 */
     34
    2935#ifndef STDARG_H__
    3036#define STDARG_H__
     
    3743
    3844#endif
     45
     46/** @}
     47 */
  • kernel/arch/amd64/include/mm/page.h

    r3ee8a075 r6b781c0  
    8282#define PTL2_ENTRIES_ARCH       512
    8383#define PTL3_ENTRIES_ARCH       512
     84
     85#define PTL0_SIZE_ARCH       ONE_FRAME
     86#define PTL1_SIZE_ARCH       ONE_FRAME
     87#define PTL2_SIZE_ARCH       ONE_FRAME
     88#define PTL3_SIZE_ARCH       ONE_FRAME
    8489
    8590#define PTL0_INDEX_ARCH(vaddr)  (((vaddr)>>39)&0x1ff)
  • kernel/arch/arm32/Makefile.inc

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2005 Martin Decky
    3 # Copyright (c) 2007 Jakub Jermar
     2# Copyright (c) 2007 Jakub Jermar, Michal Kebrt
    43# All rights reserved.
    54#
     
    3332BFD_NAME = elf32-little
    3433BFD_ARCH = arm
    35 BFD = elf32-little
     34BFD = binary
    3635TARGET = arm-linux-gnu
    3736TOOLCHAIN_DIR = /usr/local/arm
    3837
    39 GCC_CFLAGS +=
     38KERNEL_LOAD_ADDRESS = 0x80200000
    4039
    41 DEFS += -D__32_BITS__ -DMACHINE=$(MACHINE)
     40ifeq ($(MACHINE), gxemul_testarm)
     41        DMACHINE = MACHINE_GXEMUL_TESTARM
     42endif
     43
     44GCC_CFLAGS += -fno-zero-initialized-in-bss
     45
     46DEFS += -D__32_BITS__ -DKERNEL_LOAD_ADDRESS=$(KERNEL_LOAD_ADDRESS) -D$(DMACHINE)
     47
     48# Compile with framebuffer support
     49
     50ifeq ($(CONFIG_FB), y)
     51        DEFS += -DCONFIG_FB -DFB_INVERT_ENDIAN
     52endif
    4253
    4354## Compile with hierarchical page tables support.
     
    4960## Compile with support for address space identifiers.
    5061#
    51 
    52 CONFIG_ASID = y
    53 CONFIG_ASID_FIFO = y
     62# no HW support for ASIDs
     63#CONFIG_ASID = y
     64#CONFIG_ASID_FIFO = y
    5465
    5566## Compile with support with software division and multiplication.
     
    5970
    6071ARCH_SOURCES = \
     72        arch/$(ARCH)/src/start.S \
     73        arch/$(ARCH)/src/asm.S \
    6174        arch/$(ARCH)/src/arm32.c \
    62         arch/$(ARCH)/src/start.S \
    6375        arch/$(ARCH)/src/context.S \
    6476        arch/$(ARCH)/src/dummy.S \
     77        arch/$(ARCH)/src/panic.S \
    6578        arch/$(ARCH)/src/cpu/cpu.c \
    6679        arch/$(ARCH)/src/ddi/ddi.c \
     80        arch/$(ARCH)/src/interrupt.c \
     81        arch/$(ARCH)/src/debug/print.c \
     82        arch/$(ARCH)/src/console.c \
     83        arch/$(ARCH)/src/exception.c \
     84        arch/$(ARCH)/src/userspace.c \
    6785        arch/$(ARCH)/src/mm/as.c \
    6886        arch/$(ARCH)/src/mm/frame.c \
    69         arch/$(ARCH)/src/mm/page.c
    70        
     87        arch/$(ARCH)/src/mm/page.c \
     88        arch/$(ARCH)/src/mm/tlb.c \
     89        arch/$(ARCH)/src/mm/memory_init.c \
     90        arch/$(ARCH)/src/mm/page_fault.c
     91
     92ifeq ($(MACHINE), gxemul_testarm)
     93        ARCH_SOURCES += arch/$(ARCH)/src/drivers/gxemul.c
     94endif
     95
  • kernel/arch/arm32/_link.ld.in

    r3ee8a075 r6b781c0  
    77 */
    88
     9OUTPUT_ARCH(arm)
    910ENTRY(kernel_image_start)
    1011
     12
    1113SECTIONS {
     14        . = KERNEL_LOAD_ADDRESS;
    1215        .text : {
    1316                ktext_start = .;
     
    2326                LONG(kdata_end - kdata_start);
    2427                hardcoded_load_address = .;
    25                 LONG(0);                /* TODO */
     28                LONG(KERNEL_LOAD_ADDRESS);
     29                *(.bss);                /* uninitialized static variables */
     30                *(COMMON);              /* global variables */
     31
    2632                *(.rodata*);
    2733                *(.sdata);
    2834                *(.reginfo);
     35                symbol_table = .;
    2936                *(symtab.*);             
    3037        }
    31         _gp = . + 0x8000;
    32         .lit8 : { *(.lit8) }
    33         .lit4 : { *(.lit4) }
    3438        .sbss : {
    3539                *(.sbss);
    3640                *(.scommon);
    37         }
    38         .bss : {
    39                 *(.bss);                /* uninitialized static variables */
    40                 *(COMMON);              /* global variables */
    4141        }
    4242
     
    4949          *(.note);
    5050        }
     51
    5152}
  • kernel/arch/arm32/include/arch.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Empty.
    3334 */
    3435
  • kernel/arch/arm32/include/arg.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Empty.
    3334 */
    3435
  • kernel/arch/arm32/include/asm.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2004 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3030 * @{
    3131 */
    32 /** @file
     32/** @file
     33 *  @brief Declarations of functions implemented in assembly.
    3334 */
    3435
     
    3738
    3839#include <arch/types.h>
     40#include <arch/stack.h>
     41#include <config.h>
     42#include <arch/interrupt.h>
    3943
     44/** No such instruction on ARM to sleep CPU. */
    4045static inline void cpu_sleep(void)
    4146{
    42         /* TODO */
    4347}
    4448
    45 /** Return base address of current stack
     49/** Return base address of current stack.
    4650 *
    4751 * Return the base address of the current stack.
     
    5155static inline uintptr_t get_stack_base(void)
    5256{
    53         /* TODO */     
    54         return NULL;
     57        uintptr_t v;
     58        asm volatile (
     59                "and %0, sp, %1\n"
     60                : "=r" (v)
     61                : "r" (~(STACK_SIZE - 1))
     62        );
     63        return v;
    5564}
    5665
     
    6069    uintptr_t entry);
    6170
    62 extern ipl_t interrupts_disable(void);
    63 extern ipl_t interrupts_enable(void);
    64 extern void interrupts_restore(ipl_t ipl);
    65 extern ipl_t interrupts_read(void);
    66 
    6771#endif
    6872
  • kernel/arch/arm32/include/atomic.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Ondrej Palkovsky
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3030 * @{
    3131 */
    32 /** @file
     32/** @file
     33 *  @brief Atomic operations.
    3334 */
    3435
     
    3637#define KERN_arm32_ATOMIC_H_
    3738
    38 #define atomic_inc(x)   ((void) atomic_add(x, 1))
    39 #define atomic_dec(x)   ((void) atomic_add(x, -1))
    40 
    41 #define atomic_postinc(x) (atomic_add(x, 1) - 1)
    42 #define atomic_postdec(x) (atomic_add(x, -1) + 1)
    43 
    44 #define atomic_preinc(x) atomic_add(x, 1)
    45 #define atomic_predec(x) atomic_add(x, -1)
    46 
    47 /* Atomic addition of immediate value.
     39/** Atomic addition.
    4840 *
    49  * @param val Memory location to which will be the immediate value added.
    50  * @param i Signed immediate that will be added to *val.
     41 * @param val Where to add.
     42 * @param i   Value to be added.
    5143 *
    5244 * @return Value after addition.
     
    5446static inline long atomic_add(atomic_t *val, int i)
    5547{
    56         /* TODO */
    57         return (val->count += i);
     48        int ret;
     49        volatile long *mem = &(val->count);
     50
     51        asm volatile (
     52        "1:\n"
     53                "ldr r2, [%1]       \n"
     54                "add r3, r2, %2     \n"
     55                "str r3, %0         \n"
     56                "swp r3, r3, [%1]   \n"
     57                "cmp r3, r2         \n"
     58                "bne 1b             \n"
     59
     60                : "=m" (ret)
     61                : "r" (mem), "r" (i)
     62                : "r3", "r2"
     63        );
     64
     65        return ret;
     66}
     67
     68/** Atomic increment.
     69 *
     70 * @param val Variable to be incremented.
     71 */
     72static inline void atomic_inc(atomic_t *val)
     73{
     74        atomic_add(val, 1);
     75}
     76
     77/** Atomic decrement.
     78 *
     79 * @param val Variable to be decremented.
     80 */
     81static inline void atomic_dec(atomic_t *val) {
     82        atomic_add(val, -1);
     83}
     84
     85/** Atomic pre-increment.
     86 *
     87 * @param val Variable to be incremented.
     88 * @return    Value after incrementation.
     89 */
     90static inline long atomic_preinc(atomic_t *val)
     91{
     92        return atomic_add(val, 1);
     93}
     94
     95/** Atomic pre-decrement.
     96 *
     97 * @param val Variable to be decremented.
     98 * @return    Value after decrementation.
     99 */
     100static inline long atomic_predec(atomic_t *val)
     101{
     102        return atomic_add(val, -1);
     103}
     104
     105/** Atomic post-increment.
     106 *
     107 * @param val Variable to be incremented.
     108 * @return    Value before incrementation.
     109 */
     110static inline long atomic_postinc(atomic_t *val)
     111{
     112        return atomic_add(val, 1) - 1;
     113}
     114
     115/** Atomic post-decrement.
     116 *
     117 * @param val Variable to be decremented.
     118 * @return    Value before decrementation.
     119 */
     120static inline long atomic_postdec(atomic_t *val)
     121{
     122        return atomic_add(val, -1) + 1;
    58123}
    59124
  • kernel/arch/arm32/include/barrier.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Memory barriers.
    3334 */
    3435
  • kernel/arch/arm32/include/byteorder.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Endianness definitions.
    3334 */
    3435
  • kernel/arch/arm32/include/context.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2004 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Thread context.
    3334 */
    3435
     
    3637#define KERN_arm32_CONTEXT_H_
    3738
    38 /*
    39  * Put one item onto the stack to support get_stack_base() and align it up.
    40  */
    41 #define SP_DELTA        0       /* TODO */
     39#include <align.h>
     40#include <arch/stack.h>
    4241
     42/* Put one item onto the stack to support get_stack_base() and align it up. */
     43#define SP_DELTA  (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
    4344
    4445#ifndef __ASM__
     
    4647#include <arch/types.h>
    4748
    48 /*
    49  * Only save registers that must be preserved across function calls.
     49/** Thread context containing registers that must be preserved across function
     50 * calls.
    5051 */
    5152typedef struct {
     53        uint32_t cpu_mode;
    5254        uintptr_t sp;
    5355        uintptr_t pc;
     56       
     57        uint32_t r4;
     58        uint32_t r5;
     59        uint32_t r6;
     60        uint32_t r7;
     61        uint32_t r8;
     62        uint32_t r9;
     63        uint32_t r10;
     64        uint32_t r11;
     65       
    5466        ipl_t ipl;
    5567} context_t;
     68
    5669
    5770#endif /* __ASM__ */
  • kernel/arch/arm32/include/cpu.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2004 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief CPU identification.
    3334 */
    3435
     
    3940#include <arch/asm.h>
    4041
     42
     43/** Struct representing ARM CPU identifiaction. */
    4144typedef struct {
     45        /** Implementator (vendor) number. */
     46        uint32_t imp_num;
     47
     48        /** Variant number. */
     49        uint32_t variant_num;
     50
     51        /** Architecture number. */
     52        uint32_t arch_num;
     53
     54        /** Primary part number. */
     55        uint32_t prim_part_num;
     56
     57        /** Revision number. */
     58        uint32_t rev_num;
    4259} cpu_arch_t;
    43        
     60
    4461#endif
    4562
  • kernel/arch/arm32/include/cycle.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Martin Decky
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Count of CPU cycles.
    3334 */
    3435
     
    3637#define KERN_arm32_CYCLE_H_
    3738
     39/** Returns count of CPU cycles.
     40 *
     41 *  No such instruction on ARM to get count of cycles.
     42 *
     43 *  @return Count of CPU cycles.
     44 */
    3845static inline uint64_t get_cycle(void)
    3946{
    40         /* TODO */
    4147        return 0;
    4248}
  • kernel/arch/arm32/include/debug.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Empty.
    3334 */
    3435
  • kernel/arch/arm32/include/elf.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief ARM ELF constants.
    3334 */
    3435
  • kernel/arch/arm32/include/exception.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2004 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt, Petr Stepan
     3 *
    34 * All rights reserved.
    45 *
     
    3132 */
    3233/** @file
     34 *  @brief Exception declarations.
    3335 */
    3436
     
    3739
    3840#include <arch/types.h>
     41#include <arch/regutils.h>
    3942
     43/** If defined, forces using of high exception vectors. */
     44#define HIGH_EXCEPTION_VECTORS
     45
     46#ifdef HIGH_EXCEPTION_VECTORS
     47        #define EXC_BASE_ADDRESS        0xffff0000
     48#else
     49        #define EXC_BASE_ADDRESS        0x0
     50#endif
     51
     52/* Exception Vectors */
     53#define EXC_RESET_VEC          (EXC_BASE_ADDRESS + 0x0)
     54#define EXC_UNDEF_INSTR_VEC    (EXC_BASE_ADDRESS + 0x4)
     55#define EXC_SWI_VEC            (EXC_BASE_ADDRESS + 0x8)
     56#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)
     57#define EXC_DATA_ABORT_VEC     (EXC_BASE_ADDRESS + 0x10)
     58#define EXC_IRQ_VEC            (EXC_BASE_ADDRESS + 0x18)
     59#define EXC_FIQ_VEC            (EXC_BASE_ADDRESS + 0x1c)
     60
     61/* Exception numbers */
     62#define EXC_RESET           0
     63#define EXC_UNDEF_INSTR     1
     64#define EXC_SWI             2
     65#define EXC_PREFETCH_ABORT  3
     66#define EXC_DATA_ABORT      4
     67#define EXC_IRQ             5
     68#define EXC_FIQ             6
     69
     70
     71/** Kernel stack pointer.
     72 *
     73 * It is set when thread switches to user mode,
     74 * and then used for exception handling.
     75 */
     76extern uintptr_t supervisor_sp;
     77
     78
     79/** Temporary exception stack pointer.
     80 *
     81 * Temporary stack is used in exceptions handling routines
     82 * before switching to thread's kernel stack.
     83 */
     84extern uintptr_t exc_stack;
     85
     86
     87/** Struct representing CPU state saved when an exception occurs. */
    4088typedef struct {
    41         /* TODO */
     89        uint32_t spsr;
     90        uint32_t sp;
     91        uint32_t lr;
     92
     93        uint32_t r0;
     94        uint32_t r1;
     95        uint32_t r2;
     96        uint32_t r3;
     97        uint32_t r4;
     98        uint32_t r5;
     99        uint32_t r6;
     100        uint32_t r7;
     101        uint32_t r8;
     102        uint32_t r9;
     103        uint32_t r10;
     104        uint32_t r11;
     105        uint32_t r12;
     106
     107        uint32_t pc;
    42108} istate_t;
    43109
     110
     111/** Sets Program Counter member of given istate structure.
     112 *
     113 * @param istate istate structure
     114 * @param retaddr new value of istate's PC member
     115 */
    44116static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
    45117{
    46         /* TODO */
     118        istate->pc = retaddr;
    47119}
    48120
    49 /** Return true if exception happened while in userspace */
     121
     122/** Returns true if exception happened while in userspace. */
    50123static inline int istate_from_uspace(istate_t *istate)
    51124{
    52         /* TODO */
    53         return 0;
     125        return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE;
    54126}
     127
     128
     129/** Returns Program Counter member of given istate structure. */
    55130static inline unative_t istate_get_pc(istate_t *istate)
    56131{
    57         /* TODO */
    58         return 0;
     132        return istate->pc;
    59133}
     134
     135
     136extern void install_exception_handlers(void);
     137extern void exception_init(void);
     138extern void print_istate(istate_t *istate);
     139
    60140
    61141#endif
  • kernel/arch/arm32/include/faddr.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Function address conversion.
    3334 */
    3435
     
    3839#include <arch/types.h>
    3940
     41/** Calculate absolute address of function referenced by fptr pointer.
     42 *
     43 * @param fptr Function pointer.
     44 */
    4045#define FADDR(fptr)             ((uintptr_t) (fptr))
    4146
  • kernel/arch/arm32/include/fpu_context.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Vana
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief FPU context (not implemented).
     34 *
     35 *  GXemul doesn't support FPU on its ARM CPU.
    3336 */
    3437
     
    3841#include <arch/types.h>
    3942
    40 #define FPU_CONTEXT_ALIGN    0  /* TODO */
     43#define FPU_CONTEXT_ALIGN    0
    4144
    4245typedef struct {
  • kernel/arch/arm32/include/interrupt.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    2828
    2929/** @addtogroup arm32interrupt
    30  * @ingroup interrupt
    3130 * @{
    3231 */
    3332/** @file
     33 *  @brief Declarations of interrupt controlling routines.
    3434 */
    3535
     
    3737#define KERN_arm32_INTERRUPT_H_
    3838
    39 #define IVT_ITEMS       0       /* TODO */
    40 #define IVT_FIRST       0       /* TODO */
     39#include <arch/types.h>
     40
     41/** Initial size of exception dispatch table. */
     42#define IVT_ITEMS       6
     43
     44/** Index of the first item in exception dispatch table. */
     45#define IVT_FIRST       0
     46
     47
     48extern void interrupt_init(void);
     49extern ipl_t interrupts_disable(void);
     50extern ipl_t interrupts_enable(void);
     51extern void interrupts_restore(ipl_t ipl);
     52extern ipl_t interrupts_read(void);
     53
    4154
    4255#endif
  • kernel/arch/arm32/include/memstr.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Memory manipulating functions declarations.
    3334 */
    3435
  • kernel/arch/arm32/include/mm/as.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Address space manipulating functions declarations.
    3334 */
    3435
     
    3839#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH      0
    3940
    40 #define KERNEL_ADDRESS_SPACE_START_ARCH         (unsigned long) 0x80000000
    41 #define KERNEL_ADDRESS_SPACE_END_ARCH           (unsigned long) 0xffffffff
    42 #define USER_ADDRESS_SPACE_START_ARCH           (unsigned long) 0x00000000
    43 #define USER_ADDRESS_SPACE_END_ARCH             (unsigned long) 0x7fffffff
     41#define KERNEL_ADDRESS_SPACE_START_ARCH     (unsigned long) 0x80000000
     42#define KERNEL_ADDRESS_SPACE_END_ARCH       (unsigned long) 0xffffffff
     43#define USER_ADDRESS_SPACE_START_ARCH       (unsigned long) 0x00000000
     44#define USER_ADDRESS_SPACE_END_ARCH         (unsigned long) 0x7fffffff
    4445
    4546#define USTACK_ADDRESS_ARCH     (0x80000000 - PAGE_SIZE)
     
    5354#define as_destructor_arch(as)                  (as != as)
    5455#define as_create_arch(as, flags)               (as != as)
     56#define as_install_arch(as)
    5557#define as_deinstall_arch(as)
    5658#define as_invalidate_translation_cache(as, page, cnt)
  • kernel/arch/arm32/include/mm/asid.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Martin Decky
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief ASIDs related declarations.
     34 *
     35 *  ARM CPUs doesn't support ASIDs.
    3336 */
    3437
     
    3841#include <arch/types.h>
    3942
    40 #define ASID_MAX_ARCH           3       /* TODO */
     43#define ASID_MAX_ARCH           3       /* minimal required number */
    4144
    4245typedef uint8_t asid_t;
     46
     47/*
     48 * This works due to fact that this file is never included alone but only
     49 * through "generic/include/mm/asid.h" where ASID_START is defined.
     50 */
     51#define asid_get()              (ASID_START + 1)
     52
     53#define asid_put(asid)
    4354
    4455#endif
  • kernel/arch/arm32/include/mm/frame.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Frame related declarations.
    3334 */
    3435
     
    3637#define KERN_arm32_FRAME_H_
    3738
    38 #define FRAME_WIDTH             0       /* TODO */
     39#define FRAME_WIDTH             12 /* 4KB frames */
    3940#define FRAME_SIZE              (1 << FRAME_WIDTH)
    4041
     
    4243#ifndef __ASM__
    4344
     45#include <arch/types.h>
     46
     47#define BOOT_PAGE_TABLE_SIZE    0x4000
     48#define BOOT_PAGE_TABLE_ADDRESS 0x4000
     49
     50#define BOOT_PAGE_TABLE_START_FRAME     (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH)
     51#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES  (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH)
     52
     53extern uintptr_t last_frame;
     54
    4455extern void frame_arch_init(void);
     56extern void boot_page_table_free(void);
    4557
    4658#endif /* __ASM__ */
  • kernel/arch/arm32/include/mm/memory_init.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Memory information functions declarations.
    3334 */
    3435
     
    3839#include <config.h>
    3940
    40 #define get_memory_size()       CONFIG_MEMORY_SIZE      /* TODO */
     41size_t get_memory_size(void);
    4142
    4243#endif
  • kernel/arch/arm32/include/mm/page.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2007 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Paging related declarations.
    3334 */
    3435
     
    3738
    3839#include <arch/mm/frame.h>
     40#include <mm/mm.h>
     41#include <arch/exception.h>
    3942
    4043#define PAGE_WIDTH      FRAME_WIDTH
     
    5356#ifdef KERNEL
    5457
    55 #define PTL0_ENTRIES_ARCH       0       /* TODO */
    56 #define PTL1_ENTRIES_ARCH       0       /* TODO */
    57 #define PTL2_ENTRIES_ARCH       0       /* TODO */
    58 #define PTL3_ENTRIES_ARCH       0       /* TODO */
    59 
    60 #define PTL0_INDEX_ARCH(vaddr)  0       /* TODO */
    61 #define PTL1_INDEX_ARCH(vaddr)  0       /* TODO */
    62 #define PTL2_INDEX_ARCH(vaddr)  0       /* TODO */
    63 #define PTL3_INDEX_ARCH(vaddr)  0       /* TODO */
    64 
    65 #define SET_PTL0_ADDRESS_ARCH(ptl0)
    66 
    67 #define GET_PTL1_ADDRESS_ARCH(ptl0, i)          0       /* TODO */
    68 #define GET_PTL2_ADDRESS_ARCH(ptl1, i)          0       /* TODO */
    69 #define GET_PTL3_ADDRESS_ARCH(ptl2, i)          0       /* TODO */
    70 #define GET_FRAME_ADDRESS_ARCH(ptl3, i)         0       /* TODO */
    71 
    72 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)       /* TODO */
    73 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)       /* TODO */
    74 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)       /* TODO */
    75 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)      /* TODO */
    76 
    77 #define GET_PTL1_FLAGS_ARCH(ptl0, i)            0       /* TODO */
    78 #define GET_PTL2_FLAGS_ARCH(ptl1, i)            0       /* TODO */
    79 #define GET_PTL3_FLAGS_ARCH(ptl2, i)            0       /* TODO */
    80 #define GET_FRAME_FLAGS_ARCH(ptl3, i)           0       /* TODO */
    81 
    82 #define SET_PTL1_FLAGS_ARCH(ptl0, i, x)         /* TODO */
    83 #define SET_PTL2_FLAGS_ARCH(ptl1, i, x)         /* TODO */
    84 #define SET_PTL3_FLAGS_ARCH(ptl2, i, x)         /* TODO */
    85 #define SET_FRAME_FLAGS_ARCH(ptl3, i, x)        /* TODO */
    86 
    87 #define PTE_VALID_ARCH(pte)                     0       /* TODO */
    88 #define PTE_PRESENT_ARCH(pte)                   0       /* TODO */
    89 #define PTE_GET_FRAME_ARCH(pte)                 0       /* TODO */
    90 #define PTE_WRITABLE_ARCH(pte)                  0       /* TODO */
    91 #define PTE_EXECUTABLE_ARCH(pte)                0       /* TODO */
     58#define PTL0_ENTRIES_ARCH       (2 << 12)       /* 4096 */
     59#define PTL1_ENTRIES_ARCH       0
     60#define PTL2_ENTRIES_ARCH       0
     61
     62/* coarse page tables used (256 * 4 = 1KB per page) */
     63#define PTL3_ENTRIES_ARCH       (2 << 8)        /* 256 */
     64
     65#define PTL0_SIZE_ARCH          FOUR_FRAMES
     66#define PTL1_SIZE_ARCH          0
     67#define PTL2_SIZE_ARCH          0
     68#define PTL3_SIZE_ARCH          ONE_FRAME
     69
     70#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 20) & 0xfff)
     71#define PTL1_INDEX_ARCH(vaddr)  0
     72#define PTL2_INDEX_ARCH(vaddr)  0
     73#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x0ff)
     74
     75#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
     76        ((pte_t *) ((((pte_level0_t *)(ptl0))[(i)]).coarse_table_addr << 10))
     77#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
     78        (ptl1)
     79#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
     80        (ptl2)
     81#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
     82        ((uintptr_t) ((((pte_level1_t *)(ptl3))[(i)]).frame_base_addr << 12))
     83
     84#define SET_PTL0_ADDRESS_ARCH(ptl0) \
     85        (set_ptl0_addr((pte_level0_t *) (ptl0)))
     86#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
     87        (((pte_level0_t *) (ptl0))[(i)].coarse_table_addr = (a) >> 10)
     88#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
     89#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
     90#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
     91        (((pte_level1_t *) (ptl3))[(i)].frame_base_addr = (a) >> 12)
     92
     93#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
     94        get_pt_level0_flags((pte_level0_t *) (ptl0), (index_t) (i))
     95#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
     96        PAGE_PRESENT
     97#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
     98        PAGE_PRESENT
     99#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
     100        get_pt_level1_flags((pte_level1_t *) (ptl3), (index_t) (i))
     101
     102#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
     103        set_pt_level0_flags((pte_level0_t *) (ptl0), (index_t) (i), (x))
     104#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
     105#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
     106#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
     107        set_pt_level1_flags((pte_level1_t *) (ptl3), (index_t) (i), (x))
     108
     109#define PTE_VALID_ARCH(pte) \
     110        (*((uint32_t *) (pte)) != 0)
     111#define PTE_PRESENT_ARCH(pte) \
     112        (((pte_level0_t *) (pte))->descriptor_type != 0)
     113
     114/* pte should point into ptl3 */
     115#define PTE_GET_FRAME_ARCH(pte) \
     116        (((pte_level1_t *) (pte))->frame_base_addr << FRAME_WIDTH)
     117
     118/* pte should point into ptl3 */
     119#define PTE_WRITABLE_ARCH(pte) \
     120        (((pte_level1_t *) (pte))->access_permission_0 == \
     121            PTE_AP_USER_RW_KERNEL_RW)
     122
     123#define PTE_EXECUTABLE_ARCH(pte) \
     124        1
    92125
    93126#ifndef __ASM__
    94127
    95 #include <mm/mm.h>
    96 #include <arch/exception.h>
    97 
    98 static inline int get_pt_flags(pte_t *pt, index_t i)
    99 {
    100         return 0;       /* TODO */
    101 }
    102 
    103 static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
    104 {
    105         /* TODO */
    106         return;
    107 }
     128/** Level 0 page table entry. */
     129typedef struct {
     130        /* 0b01 for coarse tables, see below for details */
     131        unsigned descriptor_type     : 2;
     132        unsigned impl_specific       : 3;
     133        unsigned domain              : 4;
     134        unsigned should_be_zero      : 1;
     135
     136        /* Pointer to the coarse 2nd level page table (holding entries for small
     137         * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page
     138         * tables that may hold even tiny pages (1KB) but they are bigger (4KB
     139         * per table in comparison with 1KB per the coarse table)
     140         */
     141        unsigned coarse_table_addr   : 22;
     142} ATTRIBUTE_PACKED pte_level0_t;
     143
     144/** Level 1 page table entry (small (4KB) pages used). */
     145typedef struct {
     146
     147        /* 0b10 for small pages */
     148        unsigned descriptor_type     : 2;
     149        unsigned bufferable          : 1;
     150        unsigned cacheable           : 1;
     151
     152        /* access permissions for each of 4 subparts of a page
     153         * (for each 1KB when small pages used */
     154        unsigned access_permission_0 : 2;
     155        unsigned access_permission_1 : 2;
     156        unsigned access_permission_2 : 2;
     157        unsigned access_permission_3 : 2;
     158        unsigned frame_base_addr     : 20;
     159} ATTRIBUTE_PACKED pte_level1_t;
     160
     161
     162/* Level 1 page tables access permissions */
     163
     164/** User mode: no access, privileged mode: no access. */
     165#define PTE_AP_USER_NO_KERNEL_NO        0
     166
     167/** User mode: no access, privileged mode: read/write. */
     168#define PTE_AP_USER_NO_KERNEL_RW        1
     169
     170/** User mode: read only, privileged mode: read/write. */
     171#define PTE_AP_USER_RO_KERNEL_RW        2
     172
     173/** User mode: read/write, privileged mode: read/write. */
     174#define PTE_AP_USER_RW_KERNEL_RW        3
     175
     176
     177/* pte_level0_t and pte_level1_t descriptor_type flags */
     178
     179/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */
     180#define PTE_DESCRIPTOR_NOT_PRESENT      0
     181
     182/** pte_level0_t coarse page table flag (used in descriptor_type). */
     183#define PTE_DESCRIPTOR_COARSE_TABLE     1
     184
     185/** pte_level1_t small page table flag (used in descriptor type). */
     186#define PTE_DESCRIPTOR_SMALL_PAGE       2
     187
     188
     189/** Sets the address of level 0 page table.
     190 *
     191 * @param pt    Pointer to the page table to set.
     192 */   
     193static inline void set_ptl0_addr( pte_level0_t *pt)
     194{
     195        asm volatile (
     196                "mcr p15, 0, %0, c2, c0, 0 \n"
     197                :
     198                : "r"(pt)
     199        );
     200}
     201
     202
     203/** Returns level 0 page table entry flags.
     204 *
     205 *  @param pt     Level 0 page table.
     206 *  @param i      Index of the entry to return.
     207 */
     208static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)
     209{
     210        pte_level0_t *p = &pt[i];
     211        int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT);
     212
     213        return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |
     214            (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |
     215            (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT);
     216}
     217
     218/** Returns level 1 page table entry flags.
     219 *
     220 *  @param pt     Level 1 page table.
     221 *  @param i      Index of the entry to return.
     222 */
     223static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)
     224{
     225        pte_level1_t *p = &pt[i];
     226
     227        int dt = p->descriptor_type;
     228        int ap = p->access_permission_0;
     229
     230        return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) |
     231            ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) |
     232            ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) |
     233            ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) |
     234            ((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) |
     235            ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) |
     236            ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) |
     237            (1 << PAGE_EXEC_SHIFT) |
     238            (p->bufferable << PAGE_CACHEABLE);
     239}
     240
     241
     242/** Sets flags of level 0 page table entry.
     243 *
     244 *  @param pt     level 0 page table
     245 *  @param i      index of the entry to be changed
     246 *  @param flags  new flags
     247 */
     248static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags)
     249{
     250        pte_level0_t *p = &pt[i];
     251
     252        if (flags & PAGE_NOT_PRESENT) {
     253                p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
     254                /*
     255                 * Ensures that the entry will be recognized as valid when
     256                 * PTE_VALID_ARCH applied.
     257                 */
     258                p->should_be_zero = 1;
     259        } else {
     260                p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
     261                p->should_be_zero = 0;
     262    }
     263}
     264
     265
     266/** Sets flags of level 1 page table entry.
     267 *
     268 *  We use same access rights for the whole page. When page is not preset we
     269 *  store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct
     270 *  page entry, see #PAGE_VALID_ARCH).
     271 *
     272 *  @param pt     Level 1 page table.
     273 *  @param i      Index of the entry to be changed.
     274 *  @param flags  New flags.
     275 */ 
     276static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags)
     277{
     278        pte_level1_t *p = &pt[i];
     279       
     280        if (flags & PAGE_NOT_PRESENT) {
     281                p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
     282                p->access_permission_3 = 1;
     283        } else {
     284                p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE;
     285                p->access_permission_3 = p->access_permission_0;
     286        }
     287 
     288        p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0;
     289
     290        /* default access permission */
     291        p->access_permission_0 = p->access_permission_1 =
     292            p->access_permission_2 = p->access_permission_3 =
     293            PTE_AP_USER_NO_KERNEL_RW;
     294
     295        if (flags & PAGE_USER)  {
     296                if (flags & PAGE_READ) {
     297                        p->access_permission_0 = p->access_permission_1 =
     298                            p->access_permission_2 = p->access_permission_3 =
     299                            PTE_AP_USER_RO_KERNEL_RW;
     300                }
     301                if (flags & PAGE_WRITE) {
     302                        p->access_permission_0 = p->access_permission_1 =
     303                            p->access_permission_2 = p->access_permission_3 =
     304                            PTE_AP_USER_RW_KERNEL_RW;
     305                }
     306        }
     307}
     308
    108309
    109310extern void page_arch_init(void);
    110311
     312
    111313#endif /* __ASM__ */
    112314
  • kernel/arch/arm32/include/mm/tlb.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief TLB related declarations.
    3334 */
    3435
  • kernel/arch/arm32/include/proc/task.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Task related declarations.
    3334 */
    3435
  • kernel/arch/arm32/include/proc/thread.h

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief Thread related declarations.
    3334 */
    3435
     
    4748/** @}
    4849 */
    49 
  • kernel/arch/arm32/include/types.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2007 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Type definitions.
    3334 */
    3435
    3536#ifndef KERN_arm32_TYPES_H_
    3637#define KERN_arm32_TYPES_H_
     38
     39#ifndef DOXYGEN
     40#       define ATTRIBUTE_PACKED __attribute__ ((packed))
     41#else
     42#       define ATTRIBUTE_PACKED
     43#endif
    3744
    3845#define NULL 0
     
    7077typedef int32_t devno_t;
    7178
    72 /** Page Table Entry. */
     79
     80/** Page table entry.
     81 *
     82 *  We have different structs for level 0 and level 1 page table entries.
     83 *  See page.h for definition of pte_level*_t.
     84 */
    7385typedef struct {
    74         /* placeholder */
     86        unsigned dummy : 32;
    7587} pte_t;
    7688
  • kernel/arch/arm32/src/arm32.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2004 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief ARM32 architecture specific functions.
    3334 */
    3435
     36#include <arch.h>
     37#include <arch/boot.h>
     38#include <config.h>
     39#include <arch/console.h>
     40#include <ddi/device.h>
     41#include <genarch/fb/fb.h>
     42#include <genarch/fb/visuals.h>
     43#include <ddi/irq.h>
     44#include <arch/debug/print.h>
     45#include <print.h>
     46#include <config.h>
     47#include <interrupt.h>
     48#include <arch/regutils.h>
     49#include <arch/machine.h>
     50#include <userspace.h>
    3551
    36 #include <arch.h>
     52/** Information about loaded tasks. */
     53bootinfo_t bootinfo;
    3754
     55/** Performs arm32 specific initialization before main_bsp() is called. */
    3856void arch_pre_main(void)
    3957{
    40         /* TODO */
     58        int i;
     59
     60        init.cnt = bootinfo.cnt;
     61
     62        for (i = 0; i < bootinfo.cnt; ++i) {
     63                init.tasks[i].addr = bootinfo.tasks[i].addr;
     64                init.tasks[i].size = bootinfo.tasks[i].size;
     65        }
     66       
    4167}
    4268
     69/** Performs arm32 specific initialization before mm is initialized. */
    4370void arch_pre_mm_init(void)
    4471{
    45         /* TODO */
     72        /* It is not assumed by default */
     73        interrupts_disable();
    4674}
    4775
     76/** Performs arm32 specific initialization afterr mm is initialized. */
    4877void arch_post_mm_init(void)
    4978{
    50         /* TODO */
     79        machine_hw_map_init();
     80
     81        /* Initialize exception dispatch table */
     82        exception_init();
     83
     84        interrupt_init();
     85       
     86        console_init(device_assign_devno());
     87
     88#ifdef CONFIG_FB
     89        fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8);
     90#endif
    5191}
    5292
     93/** Performs arm32 specific tasks needed after cpu is initialized.
     94 *
     95 * Currently the function is empty.
     96 */
    5397void arch_post_cpu_init(void)
    5498{
    55         /* TODO */
    5699}
    57100
     101
     102/** Performs arm32 specific tasks needed before the multiprocessing is
     103 * initialized.
     104 *
     105 * Currently the function is empty because SMP is not supported.
     106 */
    58107void arch_pre_smp_init(void)
    59108{
    60         /* TODO */
    61109}
    62110
     111
     112/** Performs arm32 specific tasks needed after the multiprocessing is
     113 * initialized.
     114 *
     115 * Currently the function is empty because SMP is not supported.
     116 */
    63117void arch_post_smp_init(void)
    64118{
    65         /* TODO */
    66119}
    67120
    68 /** Perform arm32 specific tasks needed before the new task is run. */
     121
     122/** Performs arm32 specific tasks needed before the new task is run. */
    69123void before_task_runs_arch(void)
    70124{
    71         /* TODO */
     125        tlb_invalidate_all();
    72126}
    73127
    74 /** Perform arm32 specific tasks needed before the new thread is scheduled. */
     128
     129/** Performs arm32 specific tasks needed before the new thread is scheduled.
     130 *
     131 * It sets supervisor_sp.
     132 */
    75133void before_thread_runs_arch(void)
    76134{
    77         /* TODO */
     135        uint8_t *stck;
     136       
     137        stck = &THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA];
     138        supervisor_sp = (uintptr_t) stck;
    78139}
    79140
     141/** Performs arm32 specific tasks before a thread stops running.
     142 *
     143 * Currently the function is empty.
     144 */
    80145void after_thread_ran_arch(void)
    81146{
    82         /* TODO */
    83147}
    84148
    85 void arch_reboot(void)
     149/** Halts CPU. */
     150void cpu_halt(void)
    86151{
    87         // TODO
    88         while (1);
     152        machine_cpu_halt();
     153}
     154
     155/** Reboot. */
     156void arch_reboot()
     157{
     158        /* not implemented */
     159        for (;;)
     160                ;
    89161}
    90162
  • kernel/arch/arm32/src/context.S

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2003-2004 Jakub Jermar
     2# Copyright (c) 2007 Petr Stepan
    33# All rights reserved.
    44#
     
    3333
    3434context_save_arch:
    35         /* TODO */
     35        stmfd sp!, {r1}
     36        mrs r1, cpsr
     37        and r1, r1, #0x1f
     38        stmia r0!, {r1}
     39        ldmfd sp!, {r1}
     40
     41        stmia r0!, {sp, lr}
     42        stmia r0!, {r4-r11}
     43
     44        mov r0, #1
     45        mov pc, lr
     46
     47
     48context_restore_arch:
     49        ldmia r0!, {r4}
     50        mrs r5, cpsr
     51        bic r5, r5, #0x1f
     52        orr r5, r5, r4
     53        msr cpsr_c, r5
     54
     55        ldmia r0!, {sp, lr}
     56        ldmia r0!, {r4-r11}
    3657       
    37 context_restore_arch:
    38         /* TODO */
     58        mov r0, #0
     59        mov pc, lr
  • kernel/arch/arm32/src/cpu/cpu.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2004 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief CPU identification.
    3334 */
    3435
     36#include <arch/cpu.h>
    3537#include <cpu.h>
     38#include <arch.h>
    3639#include <print.h>     
    3740
     41/** Number of indexes left out in the #imp_data array */
     42#define IMP_DATA_START_OFFSET 0x40
     43
     44/** Implementators (vendor) names */
     45static char *imp_data[] = {
     46        "?",                                    /* IMP_DATA_START_OFFSET */
     47        "ARM Ltd",                              /* 0x41 */
     48        "",                                     /* 0x42 */
     49        "",                                     /* 0x43 */
     50        "Digital Equipment Corporation",        /* 0x44 */
     51        "", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */
     52        "", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */
     53        "", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */
     54        "", "", "", "", "", "",                 /* 0x63 - 0x68 */
     55        "Intel Corporation"                     /* 0x69 */
     56};
     57
     58/** Length of the #imp_data array */
     59static int imp_data_length = sizeof(imp_data) / sizeof(char *);
     60
     61/** Architecture names */
     62static char *arch_data[] = {
     63        "?",       /* 0x0 */
     64        "4",       /* 0x1 */
     65        "4T",      /* 0x2 */
     66        "5",       /* 0x3 */
     67        "5T",      /* 0x4 */
     68        "5TE",     /* 0x5 */
     69        "5TEJ",    /* 0x6 */
     70        "6"        /* 0x7 */
     71};
     72
     73/** Length of the #arch_data array */
     74static int arch_data_length = sizeof(arch_data) / sizeof(char *);
     75
     76
     77/** Retrieves processor identification from CP15 register 0.
     78 *
     79 * @param cpu Structure for storing CPU identification.
     80 */
     81static void arch_cpu_identify(cpu_arch_t *cpu)
     82{
     83        uint32_t ident;
     84        asm volatile (
     85                "mrc p15, 0, %0, c0, c0, 0\n"
     86                : "=r" (ident)
     87        );
     88
     89        cpu->imp_num = ident >> 24;
     90        cpu->variant_num = (ident << 8) >> 28;
     91        cpu->arch_num = (ident << 12) >> 28;
     92        cpu->prim_part_num = (ident << 16) >> 20;
     93        cpu->rev_num = (ident << 28) >> 28;
     94}
     95
     96/** Does nothing on ARM. */
    3897void cpu_arch_init(void)
    3998{
    4099}
    41100
    42 void cpu_identify(void)
     101/** Retrieves processor identification and stores it to #CPU.arch */
     102void cpu_identify(void)
    43103{
    44         /* TODO */
     104        arch_cpu_identify(&CPU->arch);
    45105}
    46106
     107/** Prints CPU identification. */
    47108void cpu_print_report(cpu_t *m)
    48109{
    49         /* TODO */
     110        char * vendor = imp_data[0];
     111        char * architecture = arch_data[0];
     112        cpu_arch_t * cpu_arch = &m->arch;
     113
     114        if ((cpu_arch->imp_num) > 0 &&
     115            (cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {
     116                vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
     117        }
     118
     119        if ((cpu_arch->arch_num) > 0 &&
     120            (cpu_arch->arch_num < arch_data_length)) {
     121                architecture = arch_data[cpu_arch->arch_num];
     122        }
     123
     124        printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
     125            "variant=%x, revision=%x\n",
     126            m->id, vendor, architecture, cpu_arch->prim_part_num,
     127            cpu_arch->variant_num, cpu_arch->rev_num);
    50128}
    51129
  • kernel/arch/arm32/src/ddi/ddi.c

    r3ee8a075 r6b781c0  
    3131 */
    3232/** @file
     33 *  @brief DDI.
    3334 */
    3435
  • kernel/arch/arm32/src/dummy.S

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2003-2004 Jakub Jermar
     2# Copyright (c) 2007 Michal Kebry, Pavel Jancik, Petr Stepan
    33# All rights reserved.
    44#
     
    3131.global calibrate_delay_loop
    3232.global asm_delay_loop
    33 .global dummy
    34 .global arch_grab_console
    35 .global arch_release_console
    36 .global cpu_halt
     33
    3734.global fpu_context_restore
    3835.global fpu_context_save
    3936.global fpu_enable
    4037.global fpu_init
    41 .global interrupts_disable
    42 .global interrupts_enable
    43 .global interrupts_read
    44 .global interrupts_restore
    45 .global memcpy
    46 .global memcpy_from_uspace
    47 .global memcpy_to_uspace
    48 .global memsetb
    49 .global panic_printf
    50 .global symbol_table
     38
    5139.global sys_tls_set
    52 .global tlb_invalidate_asid
    53 .global tlb_invalidate_pages
    54 .global userspace
    55        
     40.global dummy
     41
    5642calibrate_delay_loop:
     43        mov     pc, lr
     44
    5745asm_delay_loop:
     46        mov     pc, lr
    5847
    59 arch_grab_console:
    60 arch_release_console:
    61 cpu_halt:
    6248fpu_context_restore:
     49        mov     pc, lr
     50   
    6351fpu_context_save:
     52        mov     pc, lr
     53   
    6454fpu_enable:
     55        mov     pc, lr
     56
    6557fpu_init:
    66 interrupts_disable:
    67 interrupts_enable:
    68 interrupts_read:
    69 interrupts_restore:
    70 memcpy:
    71 memcpy_from_uspace:
    72 memcpy_to_uspace:
    73 memsetb:
    74 panic_printf:
    75 symbol_table:
     58        mov     pc, lr
     59   
     60# not used on ARM
    7661sys_tls_set:
    77 tlb_invalidate_asid:
    78 tlb_invalidate_pages:
    79 userspace:
    8062
    8163dummy:
    82 
    83 0:
    84         b 0b
     64        mov pc, lr
  • kernel/arch/arm32/src/mm/as.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Address space functions.
    3334 */
    3435
     
    3940#include <arch.h>
    4041
    41 /** Architecture dependent address space init. */
     42/** Architecture dependent address space init.
     43 * 
     44 *  Since ARM supports page tables, #as_pt_operations are used.
     45 */
    4246void as_arch_init(void)
    4347{
    44         as_operations = &as_pt_operations;
    45         asid_fifo_init();
    46 }
    47 
    48 /** Install address space.
    49  *
    50  * Install ASID.
    51  *
    52  * @param as Address space structure.
    53  */
    54 void as_install_arch(as_t *as)
    55 {
    56         /* TODO */
     48        as_operations = &as_pt_operations;
    5749}
    5850
  • kernel/arch/arm32/src/mm/frame.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Frame related functions.
    3334 */
    3435
    3536#include <mm/frame.h>
     37#include <arch/mm/frame.h>
     38#include <config.h>
     39#include <arch/debug/print.h>
    3640
    37 /** Create memory zones. */
     41/** Address of the last frame in the memory. */
     42uintptr_t last_frame = 0;
     43
     44/** Creates memory zones. */
    3845void frame_arch_init(void)
    3946{
    40         /* TODO */
     47        /* all memory as one zone */
     48        zone_create(0, ADDR2PFN(config.memory_size),
     49            BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0);
     50        last_frame = config.memory_size;
     51
     52        /* blacklist boot page table */
     53        frame_mark_unavailable(BOOT_PAGE_TABLE_START_FRAME,
     54            BOOT_PAGE_TABLE_SIZE_IN_FRAMES);
     55}
     56
     57/** Frees the boot page table. */
     58void boot_page_table_free(void)
     59{
     60        int i;
     61        for (i = 0; i < BOOT_PAGE_TABLE_SIZE_IN_FRAMES; i++) {
     62                frame_free(i * FRAME_SIZE + BOOT_PAGE_TABLE_ADDRESS);
     63        }
    4164}
    4265
  • kernel/arch/arm32/src/mm/page.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2003-2004 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Paging related functions.
    3334 */
    3435
     
    3637#include <genarch/mm/page_pt.h>
    3738#include <mm/page.h>
     39#include <align.h>
     40#include <config.h>
     41#include <arch/exception.h>
     42#include <typedefs.h>
     43#include <arch/types.h>
     44#include <interrupt.h>
     45#include <arch/mm/frame.h>
    3846
     47/** Initializes page tables.
     48 *
     49 * 1:1 virtual-physical mapping is created in kernel address space. Mapping
     50 * for table with exception vectors is also created.
     51 */
    3952void page_arch_init(void)
    4053{
     54        uintptr_t cur;
     55        int flags;
     56
    4157        page_mapping_operations = &pt_mapping_operations;
     58
     59        flags = PAGE_CACHEABLE;
     60
     61        /* PA2KA(identity) mapping for all frames until last_frame */
     62        for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
     63                page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
     64        }
     65       
     66        /* create mapping for exception table at high offset */
     67#ifdef HIGH_EXCEPTION_VECTORS
     68        void *virtaddr = frame_alloc(ONE_FRAME, FRAME_KA);
     69        page_mapping_insert(AS_KERNEL, EXC_BASE_ADDRESS, KA2PA(virtaddr), flags);
     70#else
     71#error "Only high exception vector supported now"
     72#endif
     73
     74        as_switch(NULL, AS_KERNEL);
     75
     76        boot_page_table_free();
    4277}
    4378
    44 /** Map device into kernel space. */
     79/** Maps device into the kernel space.
     80 *
     81 * Maps physical address of device into kernel virtual address space (so it can
     82 * be accessed only by kernel through virtual address).
     83 *
     84 * @param physaddr Physical address where device is connected.
     85 * @param size Length of area where device is present.
     86 *
     87 * @return Virtual address where device will be accessible.
     88 */
    4589uintptr_t hw_map(uintptr_t physaddr, size_t size)
    4690{
    47         /* TODO */
    48         return NULL;
     91        if (last_frame + ALIGN_UP(size, PAGE_SIZE) >
     92            KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) {
     93                panic("Unable to map physical memory %p (%d bytes)",
     94                    physaddr, size)
     95        }
     96
     97        uintptr_t virtaddr = PA2KA(last_frame);
     98        pfn_t i;
     99        for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
     100                page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i),
     101                    physaddr + PFN2ADDR(i),
     102                    PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL);
     103        }
     104
     105        last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
     106        return virtaddr;
    49107}
    50108
  • kernel/arch/arm32/src/start.S

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2003-2007 Jakub Jermar
     2# Copyright (c) 2007 Michal Kebrt
    33# All rights reserved.
    44#
     
    2727#
    2828
     29#include <arch/asm/boot.h>
     30
     31.text
     32
    2933.global kernel_image_start
     34.global exc_stack
     35.global supervisor_sp
     36
    3037kernel_image_start:
     38       
     39        # switch to supervisor mode
     40        mrs r3, cpsr
     41        bic r3, r3, #0x1f
     42        orr r3, r3, #0x13
     43        msr cpsr_c, r3 
     44       
     45        ldr sp, =temp_stack
    3146
    32         /* TODO */
     47        cmp r2, #0
     48        beq bootinfo_end
     49
     50        ldr r3, =bootinfo
     51
     52        bootinfo_loop:
     53                ldr r4, [r1]
     54                str r4, [r3]
     55
     56                add r1, r1, #4
     57                add r3, r3, #4
     58                add r2, r2, #-4
     59
     60                cmp r2, #0
     61                bne bootinfo_loop
    3362       
    34 0:
    35         b 0b
     63        bootinfo_end:
     64
     65        bl arch_pre_main
     66
     67        bl main_bsp
     68
     69        .space TEMP_STACK_SIZE
     70temp_stack:
     71
     72        .space 1024
     73exc_stack:
     74
     75supervisor_sp:
     76        .space 4
     77
  • kernel/arch/ia32/include/mm/page.h

    r3ee8a075 r6b781c0  
    6161#define PTL2_ENTRIES_ARCH       0
    6262#define PTL3_ENTRIES_ARCH       1024
     63
     64#define PTL0_SIZE_ARCH       ONE_FRAME
     65#define PTL1_SIZE_ARCH       0
     66#define PTL2_SIZE_ARCH       0
     67#define PTL3_SIZE_ARCH       ONE_FRAME
    6368
    6469#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
  • kernel/arch/ia32xen/include/mm/page.h

    r3ee8a075 r6b781c0  
    6262#define PTL3_ENTRIES_ARCH       1024
    6363
     64#define PTL0_SIZE_ARCH       ONE_FRAME
     65#define PTL1_SIZE_ARCH       0
     66#define PTL2_SIZE_ARCH       0
     67#define PTL3_SIZE_ARCH       ONE_FRAME
     68
    6469#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
    6570#define PTL1_INDEX_ARCH(vaddr)  0
  • kernel/arch/mips32/include/mm/page.h

    r3ee8a075 r6b781c0  
    7474#define PTL2_ENTRIES_ARCH       0
    7575#define PTL3_ENTRIES_ARCH       4096
     76
     77#define PTL0_SIZE_ARCH       ONE_FRAME
     78#define PTL1_SIZE_ARCH       0
     79#define PTL2_SIZE_ARCH       0
     80#define PTL3_SIZE_ARCH       ONE_FRAME
    7681
    7782#define PTL0_INDEX_ARCH(vaddr)  ((vaddr)>>26)
  • kernel/arch/ppc32/include/mm/page.h

    r3ee8a075 r6b781c0  
    7171#define PTL3_ENTRIES_ARCH       1024
    7272
     73#define PTL0_SIZE_ARCH       ONE_FRAME
     74#define PTL1_SIZE_ARCH       0
     75#define PTL2_SIZE_ARCH       0
     76#define PTL3_SIZE_ARCH       ONE_FRAME
     77
    7378#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
    7479#define PTL1_INDEX_ARCH(vaddr)  0
  • kernel/arch/ppc64/include/mm/page.h

    r3ee8a075 r6b781c0  
    7070#define PTL2_ENTRIES_ARCH       0
    7171#define PTL3_ENTRIES_ARCH       1024
     72
     73#define PTL0_SIZE_ARCH          ONE_FRAME
     74#define PTL1_SIZE_ARCH          0
     75#define PTL2_SIZE_ARCH          0
     76#define PTL3_SIZE_ARCH          ONE_FRAME
    7277
    7378#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
  • kernel/doc/AUTHORS

    r3ee8a075 r6b781c0  
    11Jakub Jermar <jermar@helenos.eu>
     2Martin Decky <decky@helenos.eu>
    23Ondrej Palkovsky <palkovsky@helenos.eu>
    3 Martin Decky <decky@helenos.eu>
    44Jakub Vana <vana@helenos.eu>
    55Josef Cejka <cejka@helenos.eu>
     6Michal Kebrt <michalek.k@seznam.cz>
    67Sergey Bondari <bondari@helenos.eu>
     8Pavel Jancik <alfik.009@seznam.cz>
     9Petr Stepan <stepan.petr@volny.cz>
    710Michal Konopa <mkonopa@seznam.cz>
    8 
  • kernel/doc/doxygroups.h

    r3ee8a075 r6b781c0  
    2828        */
    2929       
     30
    3031        /**
    3132         * @cond amd64
    3233         * @defgroup amd64proc amd64
     34         * @ingroup proc
     35         * @endcond
     36         */
     37
     38         /**
     39         * @cond arm32
     40         * @defgroup arm32proc arm32
    3341         * @ingroup proc
    3442         * @endcond
     
    103111         * @endcond
    104112         */
     113         
     114        /**
     115         * @cond arm32
     116         * @defgroup arm32mm arm32     
     117         * @ingroup mm
     118         * @endcond
     119         */     
    105120       
    106121        /**
     
    172187         * @endcond
    173188         */
     189         
     190        /**
     191         * @cond arm32
     192         * @defgroup arm32ddi arm32
     193         * @ingroup ddi
     194         * @endcond
     195         */     
    174196
    175197        /**
     
    229251         * @endcond
    230252         */
     253         
     254        /**
     255         * @cond arm32
     256         * @defgroup arm32debug arm32
     257         * @ingroup debug
     258         * @endcond
     259         */     
    231260
    232261        /**
     
    286315         * @endcond
    287316         */
     317         
     318        /**
     319         * @cond arm32
     320         * @defgroup arm32interrupt arm32
     321         * @ingroup interrupt
     322         * @endcond
     323         */     
    288324
    289325        /**
     
    347383         * @endcond
    348384         */
     385         
     386        /**
     387         * @cond arm32
     388         * @defgroup arm32 arm32
     389         * @ingroup others
     390         * @endcond
     391         */     
    349392
    350393        /**
  • kernel/genarch/include/mm/page_pt.h

    r3ee8a075 r6b781c0  
    5555#define PTL2_ENTRIES                    PTL2_ENTRIES_ARCH
    5656#define PTL3_ENTRIES                    PTL3_ENTRIES_ARCH
     57
     58/* Table sizes in each level */
     59#define PTL0_SIZE                       PTL0_SIZE_ARCH
     60#define PTL1_SIZE                       PTL1_SIZE_ARCH
     61#define PTL2_SIZE                       PTL2_SIZE_ARCH
     62#define PTL3_SIZE                       PTL3_SIZE_ARCH
    5763
    5864/*
  • kernel/genarch/src/mm/as_pt.c

    r3ee8a075 r6b781c0  
    9898        pte_t *src_ptl0, *dst_ptl0;
    9999        ipl_t ipl;
     100        int table_size;
    100101
    101         dst_ptl0 = (pte_t *) frame_alloc(ONE_FRAME, FRAME_KA);
     102        dst_ptl0 = (pte_t *) frame_alloc(PTL0_SIZE, FRAME_KA);
     103        table_size = FRAME_SIZE << PTL0_SIZE;
    102104
    103105        if (flags & FLAG_AS_KERNEL) {
    104                 memsetb((uintptr_t) dst_ptl0, PAGE_SIZE, 0);
     106                memsetb((uintptr_t) dst_ptl0, table_size, 0);
    105107        } else {
    106108                uintptr_t src, dst;
     
    117119                dst = (uintptr_t) &dst_ptl0[PTL0_INDEX(KERNEL_ADDRESS_SPACE_START)];
    118120
    119                 memsetb((uintptr_t) dst_ptl0, PAGE_SIZE, 0);
    120                 memcpy((void *) dst, (void *) src, PAGE_SIZE - (src - (uintptr_t) src_ptl0));
     121                memsetb((uintptr_t) dst_ptl0, table_size, 0);
     122                memcpy((void *) dst, (void *) src, table_size - (src - (uintptr_t) src_ptl0));
    121123                mutex_unlock(&AS_KERNEL->lock);
    122124                interrupts_restore(ipl);
  • kernel/genarch/src/mm/page_pt.c

    r3ee8a075 r6b781c0  
    7676
    7777        if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
    78                 newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
    79                 memsetb((uintptr_t)newpt, PAGE_SIZE, 0);
     78                newpt = (pte_t *)frame_alloc(PTL1_SIZE, FRAME_KA);
     79                memsetb((uintptr_t)newpt, FRAME_SIZE << PTL1_SIZE, 0);
    8080                SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
    8181                SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
     
    8585
    8686        if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
    87                 newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
    88                 memsetb((uintptr_t)newpt, PAGE_SIZE, 0);
     87                newpt = (pte_t *)frame_alloc(PTL2_SIZE, FRAME_KA);
     88                memsetb((uintptr_t)newpt, FRAME_SIZE << PTL2_SIZE, 0);
    8989                SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
    9090                SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
     
    9494
    9595        if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
    96                 newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
    97                 memsetb((uintptr_t)newpt, PAGE_SIZE, 0);
     96                newpt = (pte_t *)frame_alloc(PTL3_SIZE, FRAME_KA);
     97                memsetb((uintptr_t)newpt, FRAME_SIZE << PTL3_SIZE, 0);
    9898                SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
    9999                SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
  • kernel/generic/include/mm/frame.h

    r3ee8a075 r6b781c0  
    4646#define ONE_FRAME       0
    4747#define TWO_FRAMES      1
     48#define FOUR_FRAMES     2
     49
    4850
    4951#ifdef ARCH_STACK_FRAMES
  • kernel/generic/src/printf/printf.c

    r3ee8a075 r6b781c0  
    3434
    3535#include <print.h>
     36int printf(const char *fmt, ...);
    3637
    3738int printf(const char *fmt, ...)
  • kernel/kernel.config

    r3ee8a075 r6b781c0  
    5050
    5151# Machine type
    52 @ "gxemul" GXEmul
    53 ! [ARCH=arm32] MACHINE (choice)
    54 
    55 # Machine type
    5652@ "msim" MSIM Simulator
    5753@ "simics" Virtutech Simics simulator
     
    6258
    6359# Machine type
     60@ "gxemul_testarm" GXEmul testarm
     61! [ARCH=arm32] MACHINE (choice)
     62
     63# Machine type
    6464@ "ski" Ski ia64 simulator
    6565@ "i460GX" i460GX chipset machine
     
    6767
    6868# Framebuffer support
    69 ! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)] CONFIG_FB (y/n)
     69! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=arm32&MACHINE=gxemul_testarm)] CONFIG_FB (y/n)
    7070
    7171# Framebuffer width
  • uspace/kbd/Makefile

    r3ee8a075 r6b781c0  
    3333SOFTINT_PREFIX = ../softint
    3434include $(LIBC_PREFIX)/Makefile.toolchain
     35include ../../Makefile.config
    3536
    3637CFLAGS += -Iinclude -I../libadt/include
     
    7172                genarch/src/kbd.c
    7273endif
     74ifeq ($(ARCH), arm32)
     75ifeq ($(MACHINE), gxemul_testarm)
     76        ARCH_SOURCES += \
     77                arch/$(ARCH)/src/kbd_gxemul.c
     78endif
     79endif
    7380
    7481
  • uspace/kbd/arch/arm32/include/kbd.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Josef Cejka
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    2727 */
    2828
    29 /** @addtogroup kbdarm32 arm32
    30  * @brief       HelenOS arm32 arch dependent parts of uspace keyboard handler.
    31  * @ingroup  kbd
     29/** @addtogroup kbdarm32
    3230 * @{
    3331 */
    3432/** @file
     33 *  @brief Empty.
    3534 */
    3635
  • uspace/kbd/arch/arm32/src/kbd.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Martin Decky
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3333 */
    3434/** @file
     35 *  @brief Empty, required by generic Makefile.
    3536 */
    3637
    37 #include <arch/kbd.h>
    38 #include <ipc/ipc.h>
    39 #include <sysinfo.h>
    40 #include <kbd.h>
    41 #include <keys.h>
    42 
    43 int kbd_arch_init(void)
    44 {
    45         return 0;
    46 }
    47 
    48 
    49 int kbd_arch_process(keybuffer_t *keybuffer, ipc_call_t *call)
    50 {
    51         return 1;
    52 }
    5338
    5439/** @}
  • uspace/libc/arch/arm32/Makefile.inc

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2005 Martin Decky
     2# Copyright (c) 2007 Michal Kebrt, Pavel Jancik
    33# All rights reserved.
    44#
     
    3232TARGET = arm-linux-gnu
    3333TOOLCHAIN_DIR = /usr/local/arm/bin
    34 CFLAGS +=
     34CFLAGS += -ffixed-r9 -mtp=soft
    3535LFLAGS += -N ../softint/libsoftint.a
    3636AFLAGS +=
     
    3939                arch/$(ARCH)/src/psthread.S \
    4040                arch/$(ARCH)/src/thread.c \
    41                 arch/$(ARCH)/src/dummy.S
     41                arch/$(ARCH)/src/eabi.S
    4242
    4343BFD_NAME = elf32-little
  • uspace/libc/arch/arm32/_link.ld.in

    r3ee8a075 r6b781c0  
    88
    99SECTIONS {
    10         . = 0x2000;
     10        . = 0x1000;
    1111
    12         .init ALIGN(0x2000): SUBALIGN(0x2000) {
     12        .init ALIGN(0x1000): SUBALIGN(0x1000) {
    1313                *(.init);
    1414        } : text
    1515        .text : {
    1616                *(.text);
    17                 *(.rodata*);
     17        *(.rodata*);
    1818        } :text
    19 
    20         .got ALIGN(0x2000) : SUBALIGN(0x2000) {
    21                 _gp = .;
    22                 *(.got*);
    23         } :data
    24         .data : {
     19       
     20        .data ALIGN(0x1000) : SUBALIGN(0x1000) {
    2521                *(.opd);
    2622                *(.data .data.*);
    2723                *(.sdata);
    2824        } :data
     25
    2926        .tdata : {
    3027                _tdata_start = .;
     
    3229                _tdata_end = .;
    3330        } :data
     31
    3432        .tbss : {
    3533                _tbss_start = .;
     
    3735                _tbss_end = .;
    3836        } :data
     37
    3938        .bss : {
    4039                *(.sbss);
    4140                *(.scommon);
    42                 *(COMMON);
    43                 *(.bss);
     41        *(COMMON);
     42        *(.bss);
    4443        } :data
    45 
    46         . = ALIGN(0x2000);
     44       
     45        . = ALIGN(0x1000);
    4746        _heap = .;
    48  
     47       
    4948        /DISCARD/ : {
    5049                *(*);
    51         }
     50        }
     51
    5252}
  • uspace/libc/arch/arm32/include/atomic.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Atomic operations.
    3334 */
    3435
     
    3839/** Atomic addition.
    3940 *
    40  * @param val Atomic value.
    41  * @param imm Value to add.
     41 * @param val Where to add.
     42 * @param i   Value to be added.
    4243 *
    4344 * @return Value after addition.
    4445 */
    45 static inline long atomic_add(atomic_t *val, int imm)
     46static inline long atomic_add(atomic_t *val, int i)
    4647{
    47         /* TODO */
    48         return (val->count += imm);
     48        int ret;
     49        volatile long * mem = &(val->count);
     50
     51        asm volatile (
     52                "1:                 \n"
     53                "ldr r2, [%1]       \n"
     54                "add r3, r2, %2     \n"
     55                "str r3, %0         \n"
     56                "swp r3, r3, [%1]   \n"
     57                "cmp r3, r2         \n"
     58                "bne 1b             \n"
     59
     60                : "=m" (ret)
     61                : "r" (mem), "r" (i)
     62                : "r3", "r2"
     63        );
     64
     65        return ret;
    4966}
    5067
     68
     69/** Atomic increment.
     70 *
     71 * @param val Variable to be incremented.
     72 */
    5173static inline void atomic_inc(atomic_t *val) { atomic_add(val, 1); }
     74
     75
     76/** Atomic decrement.
     77 *
     78 * @param val Variable to be decremented.
     79 */
    5280static inline void atomic_dec(atomic_t *val) { atomic_add(val, -1); }
    5381
    54 static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1) + 1; }
    55 static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1) - 1; }
    5682
    57 static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1); }
    58 static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1); }
     83/** Atomic pre-increment.
     84 *
     85 * @param val Variable to be incremented.
     86 * @return    Value after incrementation.
     87 */
     88static inline long atomic_preinc(atomic_t *val) { return atomic_add(val, 1); }
     89
     90
     91/** Atomic pre-decrement.
     92 *
     93 * @param val Variable to be decremented.
     94 * @return    Value after decrementation.
     95 */
     96static inline long atomic_predec(atomic_t *val) { return atomic_add(val, -1); }
     97
     98
     99/** Atomic post-increment.
     100 *
     101 * @param val Variable to be incremented.
     102 * @return    Value before incrementation.
     103 */
     104static inline long atomic_postinc(atomic_t *val) { return atomic_add(val, 1) - 1; }
     105
     106
     107/** Atomic post-decrement.
     108 *
     109 * @param val Variable to be decremented.
     110 * @return    Value before decrementation.
     111 */
     112static inline long atomic_postdec(atomic_t *val) { return atomic_add(val, -1) + 1; }
     113
    59114
    60115#endif
  • uspace/libc/arch/arm32/include/config.h

    r3ee8a075 r6b781c0  
    3030 * @{
    3131 */
    32 /** @file
     32/** @file 
     33 *  @brief Configuration constants.
    3334 */
    3435
  • uspace/libc/arch/arm32/include/endian.h

    r3ee8a075 r6b781c0  
    3030 * @{
    3131 */
    32 /** @file
     32/** @file
     33 *  @brief Endianness definition.
    3334 */
    3435
  • uspace/libc/arch/arm32/include/faddr.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Jakub Jermar
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3030 * @{
    3131 */
    32 /** @file
     32/** @file
     33 *  @brief Function address conversion.
    3334 */
    3435
     
    3839#include <libarch/types.h>
    3940
    40 /**
    41  *
    42  * Calculate absolute address of function
    43  * referenced by fptr pointer.
     41/** Calculate absolute address of function referenced by fptr pointer.
    4442 *
    4543 * @param f Function pointer.
    46  *
    4744 */
    4845#define FADDR(f)         (f)
  • uspace/libc/arch/arm32/include/limits.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Josef Cejka
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3030 * @{
    3131 */
    32 /** @file
    33  * @ingroup libcarm32   
     32/** @file 
     33 *  @brief Limits declarations.
    3434 */
    3535
     
    3737#define LIBC_arm32__LIMITS_H_
    3838
    39 # define LONG_MIN MIN_INT32
    40 # define LONG_MAX MAX_INT32
    41 # define ULONG_MIN MIN_UINT32
    42 # define ULONG_MAX MAX_UINT32
     39#define LONG_MIN MIN_INT32
     40#define LONG_MAX MAX_INT32
     41#define ULONG_MIN MIN_UINT32
     42#define ULONG_MAX MAX_UINT32
    4343
    4444#endif
  • uspace/libc/arch/arm32/include/psthread.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Ondrej Palkovsky
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3030 * @{
    3131 */
    32 /** @file
    33  * @ingroup libcarm32   
     32/** @file 
     33 *  @brief psthread related declarations.
    3434 */
    3535
     
    3838
    3939#include <types.h>
     40#include <align.h>
     41#include "thread.h"
    4042
    41 #define SP_DELTA        0       /* TODO */
     43/** Size of a stack item */
     44#define STACK_ITEM_SIZE         4
    4245
     46/** Stack alignment - see <a href="http://www.arm.com/support/faqdev/14269.html">ABI</a> for details */
     47#define STACK_ALIGNMENT         8
     48
     49#define SP_DELTA        (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
     50
     51
     52/** Sets data to the context.
     53 * 
     54 *  @param c     Context (#context_t).
     55 *  @param _pc   Program counter.
     56 *  @param stack Stack address.
     57 *  @param size  Stack size.
     58 *  @param ptls  Pointer to the TCB.
     59 */
     60#define context_set(c, _pc, stack, size, ptls)                  \
     61        (c)->pc = (sysarg_t) (_pc);                             \
     62        (c)->sp = ((sysarg_t) (stack)) + (size) - SP_DELTA;     \
     63        (c)->tls = ((sysarg_t)(ptls)) + sizeof(tcb_t) + ARM_TP_OFFSET;
     64
     65
     66/** Thread context.
     67 *
     68 *  Only registers preserved accross function calls are included. r9 is used
     69 *  to store a TLS address. -ffixed-r9 gcc forces gcc not to use this
     70 *  register. -mtp=soft forces gcc to use #__aeabi_read_tp to obtain
     71 *  TLS address.
     72 */
    4373typedef struct  {
    4474        uint32_t sp;
    4575        uint32_t pc;
     76        uint32_t r4;
     77        uint32_t r5;
     78        uint32_t r6;
     79        uint32_t r7;
     80        uint32_t r8;
    4681        uint32_t tls;
     82        uint32_t r10;
     83        uint32_t r11;
    4784} context_t;
     85
    4886
    4987#endif
  • uspace/libc/arch/arm32/include/stackarg.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Josef Cejka
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
     33 *  @brief Empty.
    3334 */
    3435
  • uspace/libc/arch/arm32/include/syscall.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Martin Decky
     2 * Copyright (c) 2007 Michal Kebrt
    33 * All rights reserved.
    44 *
     
    2727 */
    2828
    29 /** @addtogroup libc
     29/** @addtogroup libcarm32
    3030 * @{
    3131 */
    32 /**
    33  * @file
     32/** @file
     33 *  @brief Empty.
    3434 */
    3535
  • uspace/libc/arch/arm32/include/thread.h

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Jakub Jermar
     2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
    33 * All rights reserved.
    44 *
     
    2727 */
    2828
    29 /** @addtogroup libcia64       
     29/** @addtogroup libcarm32
    3030 * @{
    3131 */
    3232/** @file
     33 *  @brief Uspace threads and TLS.
    3334 */
    3435
     
    3839#include <unistd.h>
    3940
     41/** Stack initial size. */
    4042#define THREAD_INITIAL_STACK_PAGES_NO 1
    4143
     44/** Offsets for accessing __thread variables are shifted 8 bytes higher. */
     45#define ARM_TP_OFFSET   (-8)
     46
     47/** TCB (Thread Control Block) struct.
     48 *
     49 *  TLS starts just after this struct.
     50 */
    4251typedef struct {
     52        /** psthread data. */
    4353        void *pst_data;
    44         /* TODO */
    4554} tcb_t;
    4655
     56
     57/** Sets TLS address to the r9 register.
     58 *
     59 *  @param tcb TCB (TLS starts behind)
     60 */
    4761static inline void __tcb_set(tcb_t *tcb)
    4862{
    49         /* TODO */
     63        void *tls = (void *)tcb;
     64        tls += sizeof(tcb_t) + ARM_TP_OFFSET;
     65        asm volatile (
     66                "mov r9, %0"
     67                :
     68                : "r"(tls)
     69        );
    5070}
    5171
     72
     73/** Returns TCB address.
     74 *
     75 * @return TCB address (starts before TLS which address is stored in r9 register).
     76 */
    5277static inline tcb_t *__tcb_get(void)
    5378{
    54         /* TODO */
    55         return NULL;
     79        void *ret;
     80        asm volatile (
     81                "mov %0, r9"
     82                : "=r"(ret)
     83        );
     84        return (tcb_t *)(ret - ARM_TP_OFFSET - sizeof(tcb_t));
    5685}
     86
     87
     88/** Returns TLS address stored.
     89 *
     90 *  Implemented in assembly.
     91 *
     92 *  @return TLS address stored in r9 register
     93 */
     94extern uintptr_t __aeabi_read_tp(void);
    5795
    5896#endif
  • uspace/libc/arch/arm32/include/types.h

    r3ee8a075 r6b781c0  
    3030 * @{
    3131 */
    32 /** @file
    33  * @ingroup libcarm32
     32/** @file 
     33 *  @brief Definitions of basic types like #uintptr_t.
    3434 */
    3535
  • uspace/libc/arch/arm32/src/eabi.S

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2007 Jakub Jermar
     2# Copyright (c) 2007 Pavel Jancik
    33# All rights reserved.
    44#
     
    3030
    3131.global __aeabi_read_tp
     32
    3233__aeabi_read_tp:
    33 
    34 0:
    35         b 0b
     34        mov r0, r9
     35        mov pc, lr
  • uspace/libc/arch/arm32/src/entry.s

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2006 Jakub Jermar
     2# Copyright (c) 2007 Michal Kebrt, Pavel Jancik
    33# All rights reserved.
    44#
     
    2929.section .init, "ax"
    3030
     31.org 0
     32
    3133.global __entry
    3234.global __entry_driver
     
    3638#
    3739__entry:
     40        bl __main
     41        bl __io_init
     42        bl main
     43        bl __exit
    3844
    39 #
    40 # TODO
    41 #
     45__entry_driver:
     46        bl __main
     47        bl main
     48        bl __exit
     49
  • uspace/libc/arch/arm32/src/psthread.S

    r3ee8a075 r6b781c0  
    11#
    2 # Copyright (c) 2005 Jakub Jermar
     2# Copyright (c) 2007 Michal Kebrt
    33# All rights reserved.
    44#
     
    3333
    3434context_save:
    35         /* TODO */
     35        stmia r0!, {sp, lr}
     36        stmia r0!, {r4-r11}
     37
     38        # return 1
     39        mov r0, #1
     40        mov pc, lr
    3641
    3742context_restore:
    38         /* TODO */
     43        ldmia r0!, {sp, lr}
     44        ldmia r0!, {r4-r11}
     45
     46        #return 0
     47        mov r0, #0
     48        mov pc, lr
     49
  • uspace/libc/arch/arm32/src/syscall.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2005 Martin Decky
     2 * Copyright (c) 2007 Pavel Jancik
    33 * All rights reserved.
    44 *
     
    3131 */
    3232/** @file
    33   * @ingroup libcarm32 
     33 *  @brief Syscall routine.
    3434 */
    3535
    3636#include <libc.h>
    3737
     38
     39/** Syscall routine.
     40 *
     41 *  Stores p1-p4, id to r0-r4 registers and calls <code>swi</code>
     42 *  instruction. Returned value is read from r0 register.
     43 *
     44 *  @param p1 Parameter 1.
     45 *  @param p2 Parameter 2.
     46 *  @param p3 Parameter 3.
     47 *  @param p4 Parameter 4.
     48 *  @param id Number of syscall.
     49 *
     50 *  @return Syscall return value.
     51 */
    3852sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, const sysarg_t p3,
    3953    const sysarg_t p4, const syscall_t id)
    4054{
    41         /* TODO */
    42         return 0;
     55        register sysarg_t __arm_reg_r0 asm("r0") = p1;
     56        register sysarg_t __arm_reg_r1 asm("r1") = p2;
     57        register sysarg_t __arm_reg_r2 asm("r2") = p3;
     58        register sysarg_t __arm_reg_r3 asm("r3") = p4;
     59        register sysarg_t __arm_reg_r4 asm("r4") = id;
     60
     61        asm volatile ( "swi"
     62                : "=r" (__arm_reg_r0)
     63                : "r"  (__arm_reg_r0),
     64                  "r"  (__arm_reg_r1),
     65                  "r"  (__arm_reg_r2),
     66                  "r"  (__arm_reg_r3),
     67                  "r"  (__arm_reg_r4)
     68        );
     69
     70        return __arm_reg_r0;
    4371}
    4472
  • uspace/libc/arch/arm32/src/thread.c

    r3ee8a075 r6b781c0  
    11/*
    2  * Copyright (c) 2006 Ondrej Palkovsky
     2 * Copyright (c) 2007 Pavel Jancik
    33 * All rights reserved.
    44 *
     
    3333 */
    3434/** @file
     35 *  @brief Uspace threads and TLS.
    3536 */
    3637
     
    3839#include <malloc.h>
    3940
    40 /** Allocate TLS & TCB for initial module threads
     41/** Allocates TLS & TCB.
    4142 *
    42  * @param data Start of data section
    43  * @return pointer to tcb_t structure
     43 * @param data Start of data section (output parameter).
     44 * @param size Size of (tbss + tdata) sections.
     45 * @return     Pointer to the allocated #tcb_t structure.
    4446 */
    4547tcb_t * __alloc_tls(void **data, size_t size)
    4648{
    47         /* TODO */
    48         return NULL;
     49        tcb_t *result;
     50
     51        result = malloc(sizeof(tcb_t) + size);
     52        *data = ((void *)result) + sizeof(tcb_t);
     53        return result;
    4954}
    5055
     56/** Deallocates TLS & TCB.
     57 *
     58 * @param tcb TCB structure to be deallocated (along with corresponding TLS).
     59 * @param size Not used.
     60 */
    5161void __free_tls_arch(tcb_t *tcb, size_t size)
    5262{
    53         /* TODO */
     63        free(tcb);
    5464}
    5565
  • uspace/libc/arch/arm32/src/thread_entry.s

    r3ee8a075 r6b781c0  
    3535#
    3636__thread_entry:
    37 
    38 #
    39 # TODO
    40 #
     37        b __thread_main
  • uspace/softfloat/arch/arm32/include/functions.h

    r3ee8a075 r6b781c0  
    2929/** @addtogroup softfloatarm32 arm32   
    3030 * @ingroup sfl
    31  * @brief softfloat architecture dependent definitions
     31 * @brief Softfloat architecture dependent definitions.
    3232 * @{
    3333 */
    34 /** @file
     34/** @file
     35 *  @brief Softfloat architecture dependent definitions.
    3536 */
    3637
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