Changes in uspace/drv/uhci-hcd/hc.h [302a4b6:6ce42e85] in mainline
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/uhci-hcd/hc.h
r302a4b6 r6ce42e85 48 48 #include "transfer_list.h" 49 49 50 /** UHCI I/O registers layout */51 50 typedef struct uhci_regs { 52 /** Command register, controls HC behaviour */53 51 uint16_t usbcmd; 54 52 #define UHCI_CMD_MAX_PACKET (1 << 7) … … 61 59 #define UHCI_CMD_RUN_STOP (1 << 0) 62 60 63 /** Status register, 1 means interrupt is asserted (if enabled) */64 61 uint16_t usbsts; 65 62 #define UHCI_STATUS_HALTED (1 << 5) … … 69 66 #define UHCI_STATUS_ERROR_INTERRUPT (1 << 1) 70 67 #define UHCI_STATUS_INTERRUPT (1 << 0) 71 #define UHCI_STATUS_NM_INTERRUPTS \72 (UHCI_STATUS_PROCESS_ERROR | UHCI_STATUS_SYSTEM_ERROR)73 68 74 /** Interrupt enabled registers */75 69 uint16_t usbintr; 76 70 #define UHCI_INTR_SHORT_PACKET (1 << 3) … … 79 73 #define UHCI_INTR_CRC (1 << 0) 80 74 81 /** Register stores frame number used in SOF packet */82 75 uint16_t frnum; 83 84 /** Pointer(physical) to the Frame List */85 76 uint32_t flbaseadd; 86 87 /** SOF modification to match external timers */88 77 uint8_t sofmod; 89 78 } regs_t; 90 79 91 80 #define UHCI_FRAME_LIST_COUNT 1024 92 #define UHCI_ INT_EMULATOR_TIMEOUT 1000081 #define UHCI_CLEANER_TIMEOUT 10000 93 82 #define UHCI_DEBUGER_TIMEOUT 5000000 94 83 #define UHCI_ALLOWED_HW_FAIL 5 95 #define UHCI_NEEDED_IRQ_COMMANDS 596 84 97 /* Main HC driver structure */98 85 typedef struct hc { 99 /** USB bus driver, devices and addresses */100 86 usb_device_keeper_t manager; 101 /** USB bus driver, endpoints */102 87 usb_endpoint_manager_t ep_manager; 103 88 104 /** Addresses of I/O registers */105 89 regs_t *registers; 106 90 107 /** Frame List contains 1024 link pointers */108 91 link_pointer_t *frame_list; 109 92 110 /** List and queue of interrupt transfers */ 93 transfer_list_t transfers_bulk_full; 94 transfer_list_t transfers_control_full; 95 transfer_list_t transfers_control_slow; 111 96 transfer_list_t transfers_interrupt; 112 /** List and queue of low speed control transfers */113 transfer_list_t transfers_control_slow;114 /** List and queue of full speed bulk transfers */115 transfer_list_t transfers_bulk_full;116 /** List and queue of full speed control transfers */117 transfer_list_t transfers_control_full;118 97 119 /** Pointer table to the above lists, helps during scheduling */120 98 transfer_list_t *transfers[2][4]; 121 99 122 /** Code to be executed in kernel interrupt handler */123 100 irq_code_t interrupt_code; 124 101 125 /** Commands that form interrupt code */ 126 irq_cmd_t interrupt_commands[UHCI_NEEDED_IRQ_COMMANDS]; 102 fid_t cleaner; 103 fid_t debug_checker; 104 bool hw_interrupts; 105 unsigned hw_failures; 127 106 128 /** Fibril periodically checking status register*/ 129 fid_t interrupt_emulator; 130 131 /** Indicator of hw interrupts availability */ 132 bool hw_interrupts; 133 134 /** Number of hw failures detected. */ 135 unsigned hw_failures; 107 ddf_fun_t *ddf_instance; 136 108 } hc_t; 137 109
Note:
See TracChangeset
for help on using the changeset viewer.