Changeset 6f878b7 in mainline


Ignore:
Timestamp:
2005-08-30T15:06:03Z (19 years ago)
Author:
Ondrej Palkovsky <ondrap@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
a9387ea
Parents:
1e9a463
Message:

AMD64 now can switch into long mode.
Basic page tables working.

Location:
arch/amd64
Files:
1 added
5 edited

Legend:

Unmodified
Added
Removed
  • arch/amd64/_link.ld

    r1e9a463 r6f878b7  
    4040        _hardcoded_ktext_size = ktext_end - ktext_start + (unmapped_ktext_end - unmapped_ktext_start);
    4141        _hardcoded_kdata_size = kdata_end - kdata_start + (unmapped_kdata_end - unmapped_kdata_start);
    42         _hardcoded_load_address = -0x80008000;
    43 
     42        _hardcoded_load_address = 0xffffffff80008000;
     43        _ka_start = 0xffffffff80000000;
    4444}
  • arch/amd64/include/mm/page.h

    r1e9a463 r6f878b7  
    3333#include <arch/mm/frame.h>
    3434#include <arch/types.h>
     35#include <arch/mm/ptl.h>
    3536
    3637#define PAGE_SIZE       FRAME_SIZE
    37 
    38 #define KA2PA(x)        (((__address) (x)) + 0x80000000)
    39 #define PA2KA(x)        (((__address) (x)) - 0x80000000)
    4038
    4139#define PTL0_INDEX_ARCH(vaddr)          0
  • arch/amd64/include/pm.h

    r1e9a463 r6f878b7  
    3535
    3636#define IDT_ITEMS 64
    37 #define GDT_ITEMS 6
     37#define GDT_ITEMS 7
    3838
    3939#define NULL_DES        0
     
    5353#define AR_CODE         (3<<3)
    5454#define AR_WRITABLE     (1<<1)
     55#define AR_READABLE     (1<<1)
    5556#define AR_INTERRUPT    (0xe)
    5657#define AR_TSS          (0x9)
  • arch/amd64/src/boot/boot.S

    r1e9a463 r6f878b7  
    2727#
    2828
    29 .section K_TEXT_START
    30 .global kernel_image_start
     29#include <arch/mm/ptl.h>
    3130
    32 .code16
     31#define START_STACK     0x7c00 
     32#define START_STACK_64  $0xffffffff80007c00
     33                                       
    3334#
    3435# This is where we require any SPARTAN-kernel-compatible boot loader
     
    3940# switch to protected mode.
    4041#
     42.section K_TEXT_START
     43.code16
     44.global kernel_image_start
    4145kernel_image_start:
    4246        cli
     
    4448        movw %ax,%ds
    4549        movw %ax,%ss            # initialize stack segment register
    46         movl $0x7c00,%esp       # initialize stack pointer
     50        movl START_STACK,%esp   # initialize stack pointer
    4751       
    48         call memmap_arch_init
     52#       call memmap_arch_init
    4953       
    5054        mov $0x80000000, %eax 
     
    5761        jnc no_long_mode
    5862
    59 # Fill out GDTR.base, IDTR.base
    60         leal gdtr, %eax
    61         movl gdt_addr, %ebx
    62         movl %ebx, 2(%eax)
     63        # Load gdtr, idtr
     64        lgdt gdtr_inst
     65        lidt idtr_inst
     66       
     67        movl %cr0,%eax
     68        orl $0x1,%eax
     69        movl %eax,%cr0                  # switch to protected mode
    6370
    64         movl idt_addr, %ebx
    65         leal idtr, %eax
    66         movl %ebx, 2(%eax)
    67 
    68 # Load gdtr, idtr       
    69         lgdt gdtr
    70         lidt idtr
    71        
    72         mov $1, %eax    # Enable protected mode (CR0.PE = 1)
    73         mov %eax, %cr0
    74 
    75         jmpl $8, $now_in_prot
    76        
    77 now_in_prot:
    78        
     71        jmpl $40, $now_in_prot
    7972
    8073no_long_mode:
    81741:
    8275        jmp 1b
     76
     77# Protected 16-bit. We want to reuse the code-seg descriptor,
     78# the Default operand size must not be 1 when entering long mode       
     79now_in_prot: 
     80        # Set up stack & data descriptors
     81        movw $16, %ax
     82        movw %ax, %ds
     83        movw %ax, %fs
     84        movw %ax, %gs
     85        movw %ax, %ss
     86
     87        # Enable 64-bit page transaltion entries - CR4.PAE = 1.
     88        # Paging is not enabled until after long mode is enabled
     89        movl %cr4, %eax
     90        btsl $5, %eax
     91        movl %eax, %cr4
     92
     93        # Set up paging tables
     94        leal ptl_0, %eax
     95        movl %eax, %cr3
     96               
     97        # Enable long mode
     98        movl $0xc0000080, %ecx   # EFER MSR number
     99        rdmsr                   # Read EFER
     100        btsl $8, %eax            # Set LME=1
     101        wrmsr                   # Write EFER
     102       
     103        # Enable paging to activate long mode (set CR0.PG=1)
     104        movl %cr0, %eax
     105        btsl $31, %eax
     106        movl %eax, %cr0
     107       
     108        # At this point we are in compatibility mode
     109        jmpl $8, $start64
     110
     111.code64
     112start64:
     113        movq START_STACK_64, %rsp
     114       
     115        lidt idtr_inst
     116       
     117        call main_bsp   # never returns
     1181:
     119        jmp 1b
    83120                       
    84121
    85 .section K_DATA_START   
     122.section K_DATA_START
    86123.align 4096
    87 page_directory:
    88         .space 4096, 0
     124.global ptl_2
     125ptl_2: 
     126        .quad 0x0 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     127        .quad 0x200000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     128        .quad 0x400000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     129        .quad 0x600000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     130        .quad 0x800000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     131        .quad 0xa00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     132        .quad 0xc00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     133        .quad 0xe00000 | (PTL_WRITABLE | PTL_PRESENT | PTL_2MB_PAGE)
     134       
     135.align 4096
     136.global ptl_1
     137ptl_1:
     138        .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
     139        .fill 509,8,0
     140        .quad ptl_2 + (PTL_WRITABLE | PTL_PRESENT)
     141        .fill 2,8,0
     142       
     143.align 4096
     144.global ptl_0
     145ptl_0:
     146        .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
     147        .fill 510,8,0
     148        .quad ptl_1 + (PTL_WRITABLE | PTL_PRESENT)
    89149
    90 gdt_addr:       
    91         .quad gdt + 0x80000000
    92 idt_addr:       
    93         .quad idt + 0x80000000
     150.global gdtr_inst                               
     151gdtr_inst:
     152        .word 7*8  # GDT_ITEMS * 8
     153        .long gdt + 0x80000000
     154
     155.global idtr_inst
     156idtr_inst:
     157        .word 0
     158        .long idt + 0x80000000
  • arch/amd64/src/pm.c

    r1e9a463 r6f878b7  
    4545          .base_0_15   = 0,
    4646          .base_16_23  = 0,
    47           .access      = AR_PRESENT | AR_CODE | DPL_KERNEL,
     47          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE ,
    4848          .limit_16_19 = 0xf,
    4949          .available   = 0,
    5050          .longmode    = 1,
    51           .special     = 0, 
     51          .special     = 0,
    5252          .granularity = 1,
    5353          .base_24_31  = 0 },
     
    6161          .longmode    = 0,
    6262          .special     = 0,
    63           .granularity = 0,
     63          .granularity = 1,
    6464          .base_24_31  = 0 },
    6565        /* UTEXT descriptor */
     
    8585          .granularity = 1,
    8686          .base_24_31  = 0 },
     87        /* KTEXT 16-bit protected */
     88        { .limit_0_15  = 0xffff,
     89          .base_0_15   = 0,
     90          .base_16_23  = 0,
     91          .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
     92          .limit_16_19 = 0xf,
     93          .available   = 0,
     94          .longmode    = 0,
     95          .special     = 0,
     96          .granularity = 1,
     97          .base_24_31  = 0 },
    8798        /* TSS descriptor - set up will be completed later */
    8899        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
     
    93104static struct tss tss;
    94105
    95 /* gdtr is changed by kmp before next CPU is initialized */
    96 struct ptr_16_32 gdtr __attribute__ ((section ("K_DATA_START"))) = { .limit = sizeof(gdt) };
    97 //struct ptr_16_32 gdtr __attribute__ ((section ("K_DATA_START"))) = { .limit = sizeof(gdt), .base = KA2PA((__address) gdt) };
    98 struct ptr_16_32 idtr __attribute__ ((section ("K_DATA_START"))) = { .limit = sizeof(idt) };
     106/* Does not compile correctly if it does not exist */
     107int __attribute__ ((section ("K_DATA_START"))) __fake;
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