Changeset 6f8a426 in mainline
- Timestamp:
- 2006-02-21T00:04:20Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0fad93a
- Parents:
- cd92528
- Files:
-
- 1 added
- 12 edited
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
arch/amd64/include/cpuid.h
rcd92528 r6f8a426 27 27 */ 28 28 29 #ifndef __ CPUID_H__30 #define __ CPUID_H__29 #ifndef __amd64_CPUID_H__ 30 #define __amd64_CPUID_H__ 31 31 32 32 #define AMD_CPUID_EXTENDED 0x80000001 -
arch/ia32/include/cpuid.h
rcd92528 r6f8a426 27 27 */ 28 28 29 #ifndef __ CPUID_H__30 #define __ CPUID_H__29 #ifndef __ia32_CPUID_H__ 30 #define __ia32_CPUID_H__ 31 31 32 32 #include <arch/types.h> -
arch/mips32/include/context_offset.h
rcd92528 r6f8a426 1 1 /* This file is automatically generated by gencontext.c. */ 2 2 /* struct context */ 3 #define OFFSET_SP 0x04 #define OFFSET_PC 0x45 #define OFFSET_S0 0x86 #define OFFSET_S1 0xc7 #define OFFSET_S2 0x108 #define OFFSET_S3 0x149 #define OFFSET_S4 0x1810 #define OFFSET_S5 0x1c11 #define OFFSET_S6 0x2012 #define OFFSET_S7 0x2413 #define OFFSET_S8 0x2814 #define OFFSET_GP 0x2c3 #define OFFSET_SP 0x0 4 #define OFFSET_PC 0x4 5 #define OFFSET_S0 0x8 6 #define OFFSET_S1 0xc 7 #define OFFSET_S2 0x10 8 #define OFFSET_S3 0x14 9 #define OFFSET_S4 0x18 10 #define OFFSET_S5 0x1c 11 #define OFFSET_S6 0x20 12 #define OFFSET_S7 0x24 13 #define OFFSET_S8 0x28 14 #define OFFSET_GP 0x2c 15 15 16 16 17 17 /* struct register_dump */ 18 #define EOFFSET_AT 0x019 #define EOFFSET_V0 0x420 #define EOFFSET_V1 0x821 #define EOFFSET_A0 0xc22 #define EOFFSET_A1 0x1023 #define EOFFSET_A2 0x1424 #define EOFFSET_A3 0x1825 #define EOFFSET_T0 0x1c26 #define EOFFSET_T1 0x2027 #define EOFFSET_T2 0x2428 #define EOFFSET_T3 0x2829 #define EOFFSET_T4 0x2c30 #define EOFFSET_T5 0x3031 #define EOFFSET_T6 0x3432 #define EOFFSET_T7 0x3833 #define EOFFSET_S0 0x3c34 #define EOFFSET_S1 0x4035 #define EOFFSET_S2 0x4436 #define EOFFSET_S3 0x4837 #define EOFFSET_S4 0x4c38 #define EOFFSET_S5 0x5039 #define EOFFSET_S6 0x5440 #define EOFFSET_S7 0x5841 #define EOFFSET_T8 0x5c42 #define EOFFSET_T9 0x6043 #define EOFFSET_GP 0x6444 #define EOFFSET_SP 0x6845 #define EOFFSET_S8 0x6c46 #define EOFFSET_RA 0x7047 #define EOFFSET_LO 0x7448 #define EOFFSET_HI 0x7849 #define EOFFSET_STATUS 50 #define EOFFSET_EPC 0x8051 #define REGISTER_SPACE 18 #define EOFFSET_AT 0x0 19 #define EOFFSET_V0 0x4 20 #define EOFFSET_V1 0x8 21 #define EOFFSET_A0 0xc 22 #define EOFFSET_A1 0x10 23 #define EOFFSET_A2 0x14 24 #define EOFFSET_A3 0x18 25 #define EOFFSET_T0 0x1c 26 #define EOFFSET_T1 0x20 27 #define EOFFSET_T2 0x24 28 #define EOFFSET_T3 0x28 29 #define EOFFSET_T4 0x2c 30 #define EOFFSET_T5 0x30 31 #define EOFFSET_T6 0x34 32 #define EOFFSET_T7 0x38 33 #define EOFFSET_S0 0x3c 34 #define EOFFSET_S1 0x40 35 #define EOFFSET_S2 0x44 36 #define EOFFSET_S3 0x48 37 #define EOFFSET_S4 0x4c 38 #define EOFFSET_S5 0x50 39 #define EOFFSET_S6 0x54 40 #define EOFFSET_S7 0x58 41 #define EOFFSET_T8 0x5c 42 #define EOFFSET_T9 0x60 43 #define EOFFSET_GP 0x64 44 #define EOFFSET_SP 0x68 45 #define EOFFSET_S8 0x6c 46 #define EOFFSET_RA 0x70 47 #define EOFFSET_LO 0x74 48 #define EOFFSET_HI 0x78 49 #define EOFFSET_STATUS 0x7c 50 #define EOFFSET_EPC 0x80 51 #define REGISTER_SPACE 132 -
arch/ppc32/Makefile.inc
rcd92528 r6f8a426 56 56 arch/$(ARCH)/src/context.S \ 57 57 arch/$(ARCH)/src/debug/panic.s \ 58 arch/$(ARCH)/src/fpu_context. c\58 arch/$(ARCH)/src/fpu_context.S \ 59 59 arch/$(ARCH)/src/ppc32.c \ 60 60 arch/$(ARCH)/src/dummy.s \ -
arch/ppc32/include/context_offset.h
rcd92528 r6f8a426 1 1 /* This file is automatically generated by gencontext.c. */ 2 2 /* struct context */ 3 #define OFFSET_SP 0x0 4 #define OFFSET_PC 0x4 5 #define OFFSET_R2 0x8 6 #define OFFSET_R13 0xc 7 #define OFFSET_R14 0x10 8 #define OFFSET_R15 0x14 9 #define OFFSET_R16 0x18 10 #define OFFSET_R17 0x1c 11 #define OFFSET_R18 0x20 12 #define OFFSET_R19 0x24 13 #define OFFSET_R20 0x28 14 #define OFFSET_R21 0x2c 15 #define OFFSET_R22 0x30 16 #define OFFSET_R23 0x34 17 #define OFFSET_R24 0x38 18 #define OFFSET_R25 0x3c 19 #define OFFSET_R26 0x40 20 #define OFFSET_R27 0x44 21 #define OFFSET_R28 0x48 22 #define OFFSET_R29 0x4c 23 #define OFFSET_R30 0x50 24 #define OFFSET_R31 0x54 25 #define OFFSET_CR 0x58 3 #define OFFSET_SP 0x0 4 #define OFFSET_PC 0x4 5 #define OFFSET_R2 0x8 6 #define OFFSET_R13 0xc 7 #define OFFSET_R14 0x10 8 #define OFFSET_R15 0x14 9 #define OFFSET_R16 0x18 10 #define OFFSET_R17 0x1c 11 #define OFFSET_R18 0x20 12 #define OFFSET_R19 0x24 13 #define OFFSET_R20 0x28 14 #define OFFSET_R21 0x2c 15 #define OFFSET_R22 0x30 16 #define OFFSET_R23 0x34 17 #define OFFSET_R24 0x38 18 #define OFFSET_R25 0x3c 19 #define OFFSET_R26 0x40 20 #define OFFSET_R27 0x44 21 #define OFFSET_R28 0x48 22 #define OFFSET_R29 0x4c 23 #define OFFSET_R30 0x50 24 #define OFFSET_R31 0x54 25 #define OFFSET_CR 0x58 26 27 #define OFFSET_FR14 0x0 28 #define OFFSET_FR15 0x8 29 #define OFFSET_FR16 0x10 30 #define OFFSET_FR17 0x18 31 #define OFFSET_FR18 0x20 32 #define OFFSET_FR19 0x28 33 #define OFFSET_FR20 0x30 34 #define OFFSET_FR21 0x38 35 #define OFFSET_FR22 0x40 36 #define OFFSET_FR23 0x48 37 #define OFFSET_FR24 0x50 38 #define OFFSET_FR25 0x58 39 #define OFFSET_FR26 0x60 40 #define OFFSET_FR27 0x68 41 #define OFFSET_FR28 0x70 42 #define OFFSET_FR29 0x78 43 #define OFFSET_FR30 0x80 44 #define OFFSET_FR31 0x88 45 #define OFFSET_FPSCR 0x90 -
arch/ppc32/include/cpu.h
rcd92528 r6f8a426 33 33 34 34 struct cpu_arch { 35 int version; 36 int revision; 35 37 }; 36 38 -
arch/ppc32/include/cpuid.h
rcd92528 r6f8a426 1 1 /* 2 * Copyright (C) 200 5 Jakub Vana2 * Copyright (C) 2006 Martin Decky 3 3 * All rights reserved. 4 4 * … … 25 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 *28 27 */ 29 28 30 #include <fpu_context.h> 29 #ifndef __ppc32_CPUID_H__ 30 #define __ppc32_CPUID_H__ 31 31 32 void fpu_context_save(fpu_context_t *fctx) 32 #include <arch/types.h> 33 34 struct cpu_info { 35 __u16 version; 36 __u16 revision; 37 } __attribute__ ((packed)); 38 39 static inline void cpu_version(struct cpu_info *info) 33 40 { 41 __asm__ volatile ( 42 "mfspr %0, 287\n" 43 : "=r" (*info) 44 ); 34 45 } 35 46 36 37 void fpu_context_restore(fpu_context_t *fctx) 38 { 39 } 47 #endif -
arch/ppc32/include/fpu_context.h
rcd92528 r6f8a426 30 30 #define __ppc32_FPU_CONTEXT_H__ 31 31 32 #include <arch/types.h> 32 #ifndef __ppc32_TYPES_H__ 33 # include <arch/types.h> 34 #endif 33 35 34 36 struct fpu_context { 35 }; 37 __u64 fr14; 38 __u64 fr15; 39 __u64 fr16; 40 __u64 fr17; 41 __u64 fr18; 42 __u64 fr19; 43 __u64 fr20; 44 __u64 fr21; 45 __u64 fr22; 46 __u64 fr23; 47 __u64 fr24; 48 __u64 fr25; 49 __u64 fr26; 50 __u64 fr27; 51 __u64 fr28; 52 __u64 fr29; 53 __u64 fr30; 54 __u64 fr31; 55 __u32 fpscr; 56 } __attribute__ ((packed)); 36 57 37 58 #endif -
arch/ppc32/src/asm.S
rcd92528 r6f8a426 86 86 87 87 memcpy: 88 # TODO 88 srwi. r7, r5, 3 89 addi r6, r3, -4 90 addi r4, r4, -4 91 beq 2f 92 93 andi. r0, r6, 3 94 mtctr r7 95 bne 5f 96 97 1: 98 99 lwz r7, 4(r4) 100 lwzu r8, 8(r4) 101 stw r7, 4(r6) 102 stwu r8, 8(r6) 103 bdnz 1b 104 105 andi. r5, r5, 7 106 107 2: 108 109 cmplwi 0, r5, 4 110 blt 3f 111 112 lwzu r0, 4(r4) 113 addi r5, r5, -4 114 stwu r0, 4(r6) 115 116 3: 117 118 cmpwi 0, r5, 0 119 beqlr 120 mtctr r5 121 addi r4, r4, 3 122 addi r6, r6, 3 123 124 4: 125 126 lbzu r0, 1(r4) 127 stbu r0, 1(r6) 128 bdnz 4b 89 129 blr 130 131 5: 132 133 subfic r0, r0, 4 134 mtctr r0 135 136 6: 137 138 lbz r7, 4(r4) 139 addi r4, r4, 1 140 stb r7, 4(r6) 141 addi r6, r6, 1 142 bdnz 6b 143 subf r5, r0, r5 144 rlwinm. r7, r5, 32-3, 3, 31 145 beq 2b 146 mtctr r7 147 b 1b -
arch/ppc32/src/cpu/cpu.c
rcd92528 r6f8a426 28 28 29 29 #include <arch/cpu.h> 30 #include <arch/cpuid.h> 30 31 #include <cpu.h> 31 32 … … 41 42 void cpu_identify(void) 42 43 { 44 cpu_info_t info; 45 46 cpu_version(&info); 47 CPU->arch.version = info.version; 48 CPU->arch.revision = info.revision; 43 49 } 44 50 45 51 void cpu_print_report(cpu_t *m) 46 52 { 47 printf("cpu%d: \n", m->id);53 printf("cpu%d: version=%d, revision=%d\n", m->id, m->arch.version, m->arch.revision); 48 54 } -
arch/sparc64/include/context_offset.h
rcd92528 r6f8a426 1 1 /* This file is automatically generated by gencontext.c. */ 2 2 /* struct context */ 3 #define OFFSET_SP 0x04 #define OFFSET_PC 0x85 #define OFFSET_I0 0x106 #define OFFSET_I1 0x187 #define OFFSET_I2 0x208 #define OFFSET_I3 0x289 #define OFFSET_I4 0x3010 #define OFFSET_I5 0x3811 #define OFFSET_FP 0x4012 #define OFFSET_I7 0x4813 #define OFFSET_L0 0x5014 #define OFFSET_L1 0x5815 #define OFFSET_L2 0x6016 #define OFFSET_L3 0x6817 #define OFFSET_L4 0x7018 #define OFFSET_L5 0x7819 #define OFFSET_L6 0x8020 #define OFFSET_L7 0x8821 #define OFFSET_CLEANWIN 3 #define OFFSET_SP 0x0 4 #define OFFSET_PC 0x8 5 #define OFFSET_I0 0x10 6 #define OFFSET_I1 0x18 7 #define OFFSET_I2 0x20 8 #define OFFSET_I3 0x28 9 #define OFFSET_I4 0x30 10 #define OFFSET_I5 0x38 11 #define OFFSET_FP 0x40 12 #define OFFSET_I7 0x48 13 #define OFFSET_L0 0x50 14 #define OFFSET_L1 0x58 15 #define OFFSET_L2 0x60 16 #define OFFSET_L3 0x68 17 #define OFFSET_L4 0x70 18 #define OFFSET_L5 0x78 19 #define OFFSET_L6 0x80 20 #define OFFSET_L7 0x88 21 #define OFFSET_CLEANWIN 0x98 -
generic/src/main/main.c
rcd92528 r6f8a426 182 182 printf("config.cpu_count=%d\n", config.cpu_count); 183 183 cpu_init(); 184 184 185 185 calibrate_delay_loop(); 186 186 timeout_init(); … … 198 198 if (!k) 199 199 panic("can't create kernel task\n"); 200 200 201 201 /* 202 202 * Create the first thread. … … 206 206 panic("can't create kinit thread\n"); 207 207 thread_ready(t); 208 208 209 209 /* 210 210 * This call to scheduler() will return to kinit, -
generic/src/proc/thread.c
rcd92528 r6f8a426 270 270 t->task = task; 271 271 272 t->fpu_context_exists =0;273 t->fpu_context_engaged =0;272 t->fpu_context_exists = 0; 273 t->fpu_context_engaged = 0; 274 274 275 275 /* … … 289 289 290 290 interrupts_restore(ipl); 291 291 292 292 return t; 293 293 }
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