Changeset 708d8fcd in mainline for uspace/drv/bus/usb/xhci/hw_struct/trb.h

Timestamp:

2018-01-10T00:46:29Z (7 years ago)

Author:

Ondřej Hlavatý <aearsis@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f92f6b1

Parents:

4793023

git-author:

Ondřej Hlavatý <aearsis@…> (2018-01-09 19:26:55)

git-committer:

Ondřej Hlavatý <aearsis@…> (2018-01-10 00:46:29)

Message:

xhci: rewritten isochronous transfers

There was a fundamental problem with relying on hardware to send
RING_OVERRUN/UNDERRUN events, which QEMU (and possibly others) do not
send. That resulted in not knowing if the transfer is still on schedule,
and having to ring the doorbell every time. That is not feasible,
because then the transfer can be more frequent than it should be.
Furthermore, it ignored the fact that isochronous TRBs are to be
scheduled not too late, but also not too soon (see 4.11.2.5 of the xHCI
spec).

Now, scheduling the TRBs to hardware is called feeding, and can be
delayed by setting a timer. Ring overruns/underruns are detected also at
the end of handling an event.

File:

• uspace/drv/bus/usb/xhci/hw_struct/trb.h (modified) (1 diff)

uspace/drv/bus/usb/xhci/hw_struct/trb.h

@@ -147 +147 @@
         xhci_dword_set_bits(&(trb).control, val, 17, 16)
 
-#define TRB_CTRL_SET_TBC(trb, val) \
+#define TRB_ISOCH_SET_TBC(trb, val) \
         xhci_dword_set_bits(&(trb).control, val, 8, 7)
-#define TRB_CTRL_SET_TLBPC(trb, val) \
+#define TRB_ISOCH_SET_TLBPC(trb, val) \
         xhci_dword_set_bits(&(trb).control, val, 19, 16)
-#define TRB_CTRL_SET_SIA(trb, val) \
+#define TRB_ISOCH_SET_FRAMEID(trb, val) \
+        xhci_dword_set_bits(&(trb).control, val, 30, 20)
+#define TRB_ISOCH_SET_SIA(trb, val) \
         xhci_dword_set_bits(&(trb).control, val, 31, 31)