Changeset 71b00dcc in mainline for uspace/srv/net/netif/dp8390/ne2000.c
- Timestamp:
- 2010-03-07T22:51:38Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 60ab6c3
- Parents:
- b5cbff4 (diff), 31c80a5 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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links above to see all the changes relative to each parent. - File:
-
- 1 edited
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uspace/srv/net/netif/dp8390/ne2000.c
rb5cbff4 r71b00dcc 70 70 * @param[in] millis The number of milliseconds to sleep. 71 71 */ 72 #define milli_delay( millis ) usleep(( millis ) * 1000)72 #define milli_delay(millis) usleep((millis) * 1000) 73 73 74 74 /** Type definition of the testing function. 75 75 */ 76 _PROTOTYPE( 76 _PROTOTYPE(typedef int (*testf_t), (dpeth_t *dep, int pos, u8_t *pat) ); 77 77 78 78 /** First data pattern. 79 79 */ 80 u8_t pat0[]= { 0x00, 0x00, 0x00, 0x00};80 u8_t pat0[]= {0x00, 0x00, 0x00, 0x00}; 81 81 82 82 /** Second data pattern. 83 83 */ 84 u8_t pat1[]= { 0xFF, 0xFF, 0xFF, 0xFF};84 u8_t pat1[]= {0xFF, 0xFF, 0xFF, 0xFF}; 85 85 86 86 /** Third data pattern. 87 87 */ 88 u8_t pat2[]= { 0xA5, 0x5A, 0x69, 0x96};88 u8_t pat2[]= {0xA5, 0x5A, 0x69, 0x96}; 89 89 90 90 /** Fourth data pattern. 91 91 */ 92 u8_t pat3[]= { 0x96, 0x69, 0x5A, 0xA5};92 u8_t pat3[]= {0x96, 0x69, 0x5A, 0xA5}; 93 93 94 94 /** Tests 8 bit NE2000 network interface. … … 114 114 */ 115 115 static void ne_stop(dpeth_t *dep); 116 //_PROTOTYPE( 116 //_PROTOTYPE(static void milli_delay, (unsigned long millis) ); 117 117 118 118 /** Initializes the NE2000 network interface. … … 150 150 /* Reset the dp8390 */ 151 151 outb_reg0(dep, DP_CR, CR_STP | CR_DM_ABORT); 152 for (i= 0; i < 0x1000 && ((inb_reg0(dep, DP_ISR) & 152 for (i= 0; i < 0x1000 && ((inb_reg0(dep, DP_ISR) &ISR_RST) == 0); i++) 153 153 ; /* Do nothing */ 154 154 155 155 /* Check if the dp8390 is really there */ 156 if ((inb_reg0(dep, DP_CR) & 156 if ((inb_reg0(dep, DP_CR) &(CR_STP|CR_DM_ABORT)) != 157 157 (CR_STP|CR_DM_ABORT)) 158 158 { … … 186 186 f= test_8; 187 187 } 188 if (f(dep, loc1, pat0) && f(dep, loc1, pat1) && 189 f(dep, loc1, pat2) && f(dep, loc1, pat3) && 190 f(dep, loc2, pat0) && f(dep, loc2, pat1) && 188 if (f(dep, loc1, pat0) && f(dep, loc1, pat1) && 189 f(dep, loc1, pat2) && f(dep, loc1, pat3) && 190 f(dep, loc2, pat0) && f(dep, loc2, pat1) && 191 191 f(dep, loc2, pat2) && f(dep, loc2, pat3)) 192 192 { … … 297 297 outb_reg0(dep, DP_RBCR0, 4); 298 298 outb_reg0(dep, DP_RBCR1, 0); 299 outb_reg0(dep, DP_RSAR0, pos & 299 outb_reg0(dep, DP_RSAR0, pos &0xFF); 300 300 outb_reg0(dep, DP_RSAR1, pos >> 8); 301 301 outb_reg0(dep, DP_CR, CR_DM_RW | CR_PS_P0 | CR_STA); … … 306 306 for (i= 0; i<N; i++) 307 307 { 308 if (inb_reg0(dep, DP_ISR) & 308 if (inb_reg0(dep, DP_ISR) &ISR_RDC) 309 309 break; 310 310 } … … 321 321 outb_reg0(dep, DP_RBCR0, 4); 322 322 outb_reg0(dep, DP_RBCR1, 0); 323 outb_reg0(dep, DP_RSAR0, pos & 323 outb_reg0(dep, DP_RSAR0, pos &0xFF); 324 324 outb_reg0(dep, DP_RSAR1, pos >> 8); 325 325 outb_reg0(dep, DP_CR, CR_DM_RR | CR_PS_P0 | CR_STA); … … 349 349 outb_reg0(dep, DP_RBCR0, 4); 350 350 outb_reg0(dep, DP_RBCR1, 0); 351 outb_reg0(dep, DP_RSAR0, pos & 351 outb_reg0(dep, DP_RSAR0, pos &0xFF); 352 352 outb_reg0(dep, DP_RSAR1, pos >> 8); 353 353 outb_reg0(dep, DP_CR, CR_DM_RW | CR_PS_P0 | CR_STA); … … 360 360 for (i= 0; i<N; i++) 361 361 { 362 if (inb_reg0(dep, DP_ISR) & 362 if (inb_reg0(dep, DP_ISR) &ISR_RDC) 363 363 break; 364 364 } … … 375 375 outb_reg0(dep, DP_RBCR0, 4); 376 376 outb_reg0(dep, DP_RBCR1, 0); 377 outb_reg0(dep, DP_RSAR0, pos & 377 outb_reg0(dep, DP_RSAR0, pos &0xFF); 378 378 outb_reg0(dep, DP_RSAR1, pos >> 8); 379 379 outb_reg0(dep, DP_CR, CR_DM_RR | CR_PS_P0 | CR_STA);
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