Changeset 7208b6c in mainline
- Timestamp:
- 2008-02-09T10:31:11Z (17 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a4884c70
- Parents:
- 71eef11
- Files:
-
- 106 added
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/ia64/loader/Makefile
r71eef11 r7208b6c 100 100 .PHONY: all clean depend 101 101 102 all: image.bootdisasm102 all: hello.efi disasm 103 103 104 104 -include Makefile.depend 105 106 107 hello.efi: image.boot 108 make -C gefi/HelenOS 109 cp gefi/HelenOS/hello.efi ../../../../ 110 cp gefi/HelenOS/hello.efi /boot/efi/ 111 cp gefi/HelenOS/image.bin /boot/efi/ 105 112 106 113 image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) … … 112 119 clean: 113 120 -rm -f _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) image.boot boot.disasm Makefile.depend 121 make -C gefi/HelenOS clean 114 122 115 123 _components.h _link.ld $(COMPONENT_OBJECTS): $(COMPONENTS) -
boot/arch/ia64/loader/boot.S
r71eef11 r7208b6c 58 58 br.call.sptk.many b0 = b1 59 59 60 .bss #on this line is ".bss", it cannot be seen in my mcedit :-( 60 61 61 .bss62 62 63 63 .align 8192 -
kernel/arch/ia64/include/asm.h
r71eef11 r7208b6c 41 41 42 42 43 #define IA64_IOSPACE_ADDRESS 0xE00 00FFFFC000000ULL43 #define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL 44 44 45 45 static inline void outb(uint64_t port,uint8_t v) 46 46 { 47 47 *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v; 48 48 49 asm volatile ("mf\n" ::: "memory"); 49 50 } … … 53 54 { 54 55 asm volatile ("mf\n" ::: "memory"); 56 55 57 return *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))); 56 58 } -
kernel/arch/ia64/include/drivers/ega.h
r71eef11 r7208b6c 37 37 #define KERN_ia64_EGA_H 38 38 39 #define VIDEORAM (0x E0000000000B8000LL)39 #define VIDEORAM (0xe0020000000B8000LL) 40 40 41 41 #define ROW 80 -
kernel/arch/ia64/include/mm/page.h
r71eef11 r7208b6c 48 48 /** Bit width of the TLB-locked portion of kernel address space. */ 49 49 #define KERNEL_PAGE_WIDTH 28 /* 256M */ 50 #define IO_PAGE_WIDTH 26 /* 64M */ 51 50 52 51 53 #define PPN_SHIFT 12 -
kernel/arch/ia64/src/mm/frame.c
r71eef11 r7208b6c 42 42 * for real ia64 systems that provide memory map. 43 43 */ 44 #define MEMORY_SIZE (512 * 1024 * 1024) 45 #define ROM_BASE 0xa0000 46 #define ROM_SIZE (384 * 1024) 44 #define MEMORY_SIZE (64 * 1024 * 1024) 45 #define MEMORY_BASE (64 * 1024 * 1024) 47 46 47 #define ROM_BASE 0xa0000 //For ski 48 #define ROM_SIZE (384 * 1024) //For ski 49 void poke_char(int x,int y,char ch, char c); 48 50 void frame_arch_init(void) 49 51 { 50 zone_create( 0, SIZE2FRAMES(MEMORY_SIZE), 1, 0);52 zone_create(MEMORY_BASE >> FRAME_WIDTH, SIZE2FRAMES(MEMORY_SIZE), (MEMORY_SIZE) >> FRAME_WIDTH, 0); 51 53 52 54 /* … … 54 56 */ 55 57 frame_mark_unavailable(ADDR2PFN(ROM_BASE), SIZE2FRAMES(ROM_SIZE)); 58 56 59 } 57 60 -
kernel/arch/ia64/src/start.S
r71eef11 r7208b6c 36 36 #define PS_SHIFT 2 37 37 38 #define KERNEL_TRANSLATION_I 0x0010000000000661 39 #define KERNEL_TRANSLATION_D 0x0010000000000661 38 #define KERNEL_TRANSLATION_I 0x0010000000000661 39 #define KERNEL_TRANSLATION_D 0x0010000000000661 40 #define KERNEL_TRANSLATION_VIO 0x0010000000000671 41 #define KERNEL_TRANSLATION_IO 0x00100FFFFC000671 42 #define VIO_OFFSET 0x0002000000000000 43 44 #define IO_OFFSET 0x0001000000000000 45 46 40 47 41 48 .section K_TEXT_START, "ax" … … 47 54 .auto 48 55 56 mov psr.l = r0 57 srlz.i 58 srlz.d 59 49 60 # Fill TR.i and TR.d using Region Register #VRN_KERNEL 61 50 62 51 63 movl r8 = (VRN_KERNEL << VRN_SHIFT) 52 64 mov r9 = rr[r8] 65 66 53 67 movl r10 = (RR_MASK) 54 68 and r9 = r10, r9 55 69 movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT)) 56 70 or r9 = r10, r9 71 72 57 73 mov rr[r8] = r9 74 75 58 76 59 77 movl r8 = (VRN_KERNEL << VRN_SHIFT) 60 78 mov cr.ifa = r8 61 movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT) 62 mov cr.itir = r10 79 80 81 mov r11 = cr.itir ;; 82 movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);; 83 or r10 =r10 , r11 ;; 84 mov cr.itir = r10;; 85 86 63 87 movl r10 = (KERNEL_TRANSLATION_I) 64 88 itr.i itr[r0] = r10 89 90 65 91 movl r10 = (KERNEL_TRANSLATION_D) 66 92 itr.d dtr[r0] = r10 67 93 94 95 movl r7 = 1 96 movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET 97 mov cr.ifa = r8 98 movl r10 = (KERNEL_TRANSLATION_VIO) 99 itr.d dtr[r7] = r10 100 101 102 mov r11 = cr.itir ;; 103 movl r10 = ~0xfc;; 104 and r10 =r10 , r11 ;; 105 movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);; 106 or r10 =r10 , r11 ;; 107 mov cr.itir = r10;; 108 109 110 movl r7 = 2 111 movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET 112 mov cr.ifa = r8 113 movl r10 = (KERNEL_TRANSLATION_IO) 114 itr.d dtr[r7] = r10 115 116 117 118 68 119 # initialize PSR 69 mov psr.l = r070 srlz.i71 srlz.d72 120 movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK) /* Enable paging */ 73 121 mov r9 = psr
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