Changeset 7208b6c in mainline


Ignore:
Timestamp:
2008-02-09T10:31:11Z (17 years ago)
Author:
Jakub Vana <jakub.vana@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
a4884c70
Parents:
71eef11
Message:

Basic IA64 boot and kernel suport for real machines

Files:
106 added
7 edited

Legend:

Unmodified
Added
Removed
  • boot/arch/ia64/loader/Makefile

    r71eef11 r7208b6c  
    100100.PHONY: all clean depend
    101101
    102 all: image.boot disasm
     102all: hello.efi disasm
    103103
    104104-include Makefile.depend
     105
     106
     107hello.efi: image.boot
     108        make -C gefi/HelenOS
     109        cp gefi/HelenOS/hello.efi ../../../../
     110        cp gefi/HelenOS/hello.efi /boot/efi/
     111        cp gefi/HelenOS/image.bin /boot/efi/
    105112
    106113image.boot: depend _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS)
     
    112119clean:
    113120        -rm -f _components.h _link.ld $(COMPONENT_OBJECTS) $(OBJECTS) image.boot boot.disasm Makefile.depend
     121        make -C gefi/HelenOS clean
    114122
    115123_components.h _link.ld $(COMPONENT_OBJECTS): $(COMPONENTS)
  • boot/arch/ia64/loader/boot.S

    r71eef11 r7208b6c  
    5858        br.call.sptk.many b0 = b1
    5959
     60.bss #on this line is ".bss", it cannot be seen in my mcedit :-(
    6061
    61 .bss
    6262
    6363.align 8192
  • kernel/arch/ia64/include/asm.h

    r71eef11 r7208b6c  
    4141
    4242
    43 #define IA64_IOSPACE_ADDRESS 0xE0000FFFFC000000ULL
     43#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
    4444
    4545static inline void  outb(uint64_t port,uint8_t v)
    4646{
    4747        *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
     48
    4849        asm volatile ("mf\n" ::: "memory");
    4950}
     
    5354{
    5455        asm volatile ("mf\n" ::: "memory");
     56
    5557        return *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
    5658}
  • kernel/arch/ia64/include/drivers/ega.h

    r71eef11 r7208b6c  
    3737#define KERN_ia64_EGA_H
    3838
    39 #define VIDEORAM (0xE0000000000B8000LL)
     39#define VIDEORAM (0xe0020000000B8000LL)
    4040
    4141#define ROW             80
  • kernel/arch/ia64/include/mm/page.h

    r71eef11 r7208b6c  
    4848/** Bit width of the TLB-locked portion of kernel address space. */
    4949#define KERNEL_PAGE_WIDTH               28      /* 256M */
     50#define IO_PAGE_WIDTH                   26      /* 64M */
     51
    5052
    5153#define PPN_SHIFT                       12
  • kernel/arch/ia64/src/mm/frame.c

    r71eef11 r7208b6c  
    4242 * for real ia64 systems that provide memory map.
    4343 */
    44 #define MEMORY_SIZE     (512 * 1024 * 1024)
    45 #define ROM_BASE        0xa0000
    46 #define ROM_SIZE        (384 * 1024)
     44#define MEMORY_SIZE     (64 * 1024 * 1024)
     45#define MEMORY_BASE     (64 * 1024 * 1024)
    4746
     47#define ROM_BASE        0xa0000               //For ski
     48#define ROM_SIZE        (384 * 1024)          //For ski
     49void poke_char(int x,int y,char ch, char c);
    4850void frame_arch_init(void)
    4951{
    50         zone_create(0, SIZE2FRAMES(MEMORY_SIZE), 1, 0);
     52        zone_create(MEMORY_BASE >> FRAME_WIDTH, SIZE2FRAMES(MEMORY_SIZE), (MEMORY_SIZE) >> FRAME_WIDTH, 0);
    5153       
    5254        /*
     
    5456         */
    5557        frame_mark_unavailable(ADDR2PFN(ROM_BASE), SIZE2FRAMES(ROM_SIZE));
     58       
    5659}
    5760
  • kernel/arch/ia64/src/start.S

    r71eef11 r7208b6c  
    3636#define PS_SHIFT 2
    3737
    38 #define KERNEL_TRANSLATION_I 0x0010000000000661
    39 #define KERNEL_TRANSLATION_D 0x0010000000000661
     38#define KERNEL_TRANSLATION_I  0x0010000000000661
     39#define KERNEL_TRANSLATION_D  0x0010000000000661
     40#define KERNEL_TRANSLATION_VIO 0x0010000000000671
     41#define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
     42#define VIO_OFFSET            0x0002000000000000
     43
     44#define IO_OFFSET             0x0001000000000000
     45
     46
    4047
    4148.section K_TEXT_START, "ax"
     
    4754        .auto
    4855
     56        mov psr.l = r0
     57        srlz.i
     58        srlz.d
     59
    4960        # Fill TR.i and TR.d using Region Register #VRN_KERNEL
     61
    5062
    5163        movl r8 = (VRN_KERNEL << VRN_SHIFT)
    5264        mov r9 = rr[r8]
     65
     66
    5367        movl r10 = (RR_MASK)
    5468        and r9 = r10, r9
    5569        movl r10 = ((RID_KERNEL << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
    5670        or  r9 = r10, r9
     71
     72
    5773        mov rr[r8] = r9
     74
     75
    5876
    5977        movl r8 = (VRN_KERNEL << VRN_SHIFT)
    6078        mov cr.ifa = r8
    61         movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT)
    62         mov cr.itir = r10
     79
     80       
     81        mov r11 = cr.itir ;;
     82        movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT);;
     83        or r10 =r10 , r11  ;;
     84        mov cr.itir = r10;;
     85
     86       
    6387        movl r10 = (KERNEL_TRANSLATION_I)
    6488        itr.i itr[r0] = r10
     89
     90       
    6591        movl r10 = (KERNEL_TRANSLATION_D)
    6692        itr.d dtr[r0] = r10
    6793
     94
     95        movl r7 = 1
     96        movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET
     97        mov cr.ifa = r8
     98        movl r10 = (KERNEL_TRANSLATION_VIO)
     99        itr.d dtr[r7] = r10
     100
     101
     102        mov r11 = cr.itir ;;
     103        movl r10 = ~0xfc;;
     104        and r10 =r10 , r11  ;;
     105        movl r11 = (IO_PAGE_WIDTH << PS_SHIFT);;
     106        or r10 =r10 , r11  ;;
     107        mov cr.itir = r10;;
     108
     109
     110        movl r7 = 2
     111        movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET
     112        mov cr.ifa = r8
     113        movl r10 = (KERNEL_TRANSLATION_IO)
     114        itr.d dtr[r7] = r10
     115
     116
     117
     118
    68119        # initialize PSR
    69         mov psr.l = r0
    70         srlz.i
    71         srlz.d
    72120        movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK)  /* Enable paging */
    73121        mov r9 = psr
Note: See TracChangeset for help on using the changeset viewer.