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  • kernel/arch/sparc64/src/mm/sun4u/as.c

    rda1bafb r74cbac7d  
    4141
    4242#ifdef CONFIG_TSB
    43 
    4443#include <arch/mm/tsb.h>
    4544#include <arch/memstr.h>
     
    4847#include <bitops.h>
    4948#include <macros.h>
    50 
    5149#endif /* CONFIG_TSB */
    5250
     
    6058}
    6159
    62 int as_constructor_arch(as_t *as, unsigned int flags)
     60int as_constructor_arch(as_t *as, int flags)
    6361{
    6462#ifdef CONFIG_TSB
     
    6664         * The order must be calculated with respect to the emulated
    6765         * 16K page size.
    68          *
    69          */
    70         uint8_t order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
     66         */
     67        int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
    7168            sizeof(tsb_entry_t)) >> FRAME_WIDTH);
    72        
     69
    7370        uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA);
    74        
     71
    7572        if (!tsb)
    7673                return -1;
    77        
     74
    7875        as->arch.itsb = (tsb_entry_t *) tsb;
    7976        as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT *
    8077            sizeof(tsb_entry_t));
    81        
     78
    8279        memsetb(as->arch.itsb,
    8380            (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * sizeof(tsb_entry_t), 0);
    8481#endif
    85        
    8682        return 0;
    8783}
     
    9793            sizeof(tsb_entry_t)) >> FRAME_WIDTH;
    9894        frame_free(KA2PA((uintptr_t) as->arch.itsb));
    99        
    10095        return cnt;
    10196#else
     
    10499}
    105100
    106 int as_create_arch(as_t *as, unsigned int flags)
     101int as_create_arch(as_t *as, int flags)
    107102{
    108103#ifdef CONFIG_TSB
    109104        tsb_invalidate(as, 0, (size_t) -1);
    110105#endif
    111        
    112106        return 0;
    113107}
     
    129123         *
    130124         * Moreover, the as->asid is protected by asidlock, which is being held.
    131          *
    132125         */
    133126       
     
    137130         * secondary context register from the TL=1 code just before switch to
    138131         * userspace.
    139          *
    140132         */
    141133        ctx.v = 0;
    142134        ctx.context = as->asid;
    143135        mmu_secondary_context_write(ctx.v);
    144        
    145 #ifdef CONFIG_TSB
     136
     137#ifdef CONFIG_TSB       
    146138        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    147        
     139
    148140        ASSERT(as->arch.itsb && as->arch.dtsb);
    149        
     141
    150142        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    151        
     143               
    152144        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    153145                /*
     
    155147                 * by the locked 4M kernel DTLB entry. We need
    156148                 * to map both TSBs explicitly.
    157                  *
    158149                 */
    159150                dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
    160151                dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
    161152        }
    162        
     153               
    163154        /*
    164155         * Setup TSB Base registers.
    165          *
    166156         */
    167157        tsb_base_reg_t tsb_base;
    168        
     158               
    169159        tsb_base.value = 0;
    170160        tsb_base.size = TSB_SIZE;
    171161        tsb_base.split = 0;
    172        
     162
    173163        tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
    174164        itsb_base_write(tsb_base.value);
     
    185175         * Clearing the extension registers will ensure that the value of the
    186176         * TSB Base register will be used as an address of TSB, making the code
    187          * compatible with the US port.
    188          *
     177         * compatible with the US port.
    189178         */
    190179        itsb_primary_extension_write(0);
     
    206195void as_deinstall_arch(as_t *as)
    207196{
     197
    208198        /*
    209199         * Note that we don't and may not lock the address space. That's ok
     
    211201         *
    212202         * Moreover, the as->asid is protected by asidlock, which is being held.
    213          *
    214          */
    215        
     203         */
     204
    216205#ifdef CONFIG_TSB
    217206        uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
    218        
     207
    219208        ASSERT(as->arch.itsb && as->arch.dtsb);
    220        
     209
    221210        uintptr_t tsb = (uintptr_t) as->arch.itsb;
    222        
     211               
    223212        if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
    224213                /*
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