Changeset 76cec1e in mainline for arch/mips/src/mips.c
- Timestamp:
- 2005-07-15T21:57:30Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b4a4c5e3
- Parents:
- e41c47e
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips/src/mips.c
re41c47e r76cec1e 38 38 */ 39 39 cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); 40 40 41 41 /* 42 42 * Unmask hardware clock interrupt. 43 43 */ 44 44 cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift)); 45 45 46 46 /* 47 47 * Start hardware clock.
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