Changeset 771cd22 in mainline for kernel/arch/sparc64/src/mm/tlb.c
- Timestamp:
- 2006-12-16T19:07:02Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 7e7c8747
- Parents:
- 1ecdbb0
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/mm/tlb.c
r1ecdbb0 r771cd22 58 58 static void dtlb_pte_copy(pte_t *t, bool ro); 59 59 static void itlb_pte_copy(pte_t *t); 60 static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str); 61 static void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); 62 static void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); 60 static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const 61 char *str); 62 static void do_fast_data_access_mmu_miss_fault(istate_t *istate, 63 tlb_tag_access_reg_t tag, const char *str); 64 static void do_fast_data_access_protection_fault(istate_t *istate, 65 tlb_tag_access_reg_t tag, const char *str); 63 66 64 67 char *context_encoding[] = { … … 91 94 * @param cacheable True if the mapping is cacheable, false otherwise. 92 95 */ 93 void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable) 96 void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool 97 locked, bool cacheable) 94 98 { 95 99 tlb_tag_access_reg_t tag; … … 125 129 * 126 130 * @param t Page Table Entry to be copied. 127 * @param ro If true, the entry will be created read-only, regardless of its w field. 131 * @param ro If true, the entry will be created read-only, regardless of its w 132 * field. 128 133 */ 129 134 void dtlb_pte_copy(pte_t *t, bool ro) … … 213 218 } else { 214 219 /* 215 * Forward the page fault to the address space page fault handler. 220 * Forward the page fault to the address space page fault 221 * handler. 216 222 */ 217 223 page_table_unlock(AS, true); 218 224 if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { 219 do_fast_instruction_access_mmu_miss_fault(istate, __FUNCTION__); 225 do_fast_instruction_access_mmu_miss_fault(istate, 226 __FUNCTION__); 220 227 } 221 228 } … … 224 231 /** DTLB miss handler. 225 232 * 226 * Note that some faults (e.g. kernel faults) were already resolved 227 * by the low-level, assembly language part of the fast_data_access_mmu_miss 228 * handler. 233 * Note that some faults (e.g. kernel faults) were already resolved by the 234 * low-level, assembly language part of the fast_data_access_mmu_miss handler. 229 235 */ 230 236 void fast_data_access_mmu_miss(int n, istate_t *istate) … … 240 246 if (!tag.vpn) { 241 247 /* NULL access in kernel */ 242 do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); 243 } 244 do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected kernel page fault."); 248 do_fast_data_access_mmu_miss_fault(istate, tag, 249 __FUNCTION__); 250 } 251 do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected " 252 "kernel page fault."); 245 253 } 246 254 … … 264 272 page_table_unlock(AS, true); 265 273 if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { 266 do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); 274 do_fast_data_access_mmu_miss_fault(istate, tag, 275 __FUNCTION__); 267 276 } 268 277 } … … 283 292 if (t && PTE_WRITABLE(t)) { 284 293 /* 285 * The mapping was found in the software page hash table and is writable. 286 * Demap the old mapping and insert an updated mapping into DTLB. 294 * The mapping was found in the software page hash table and is 295 * writable. Demap the old mapping and insert an updated mapping 296 * into DTLB. 287 297 */ 288 298 t->a = true; … … 296 306 } else { 297 307 /* 298 * Forward the page fault to the address space page fault handler. 308 * Forward the page fault to the address space page fault 309 * handler. 299 310 */ 300 311 page_table_unlock(AS, true); 301 312 if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) { 302 do_fast_data_access_protection_fault(istate, tag, __FUNCTION__); 313 do_fast_data_access_protection_fault(istate, tag, 314 __FUNCTION__); 303 315 } 304 316 } … … 317 329 t.value = itlb_tag_read_read(i); 318 330 319 printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", 320 i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); 331 printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, " 332 "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, " 333 "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn, 334 t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, 335 d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); 321 336 } 322 337 … … 326 341 t.value = dtlb_tag_read_read(i); 327 342 328 printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", 329 i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); 330 } 331 332 } 333 334 void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str) 343 printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, " 344 "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, " 345 "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn, 346 t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, 347 d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); 348 } 349 350 } 351 352 void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char 353 *str) 335 354 { 336 355 fault_if_from_uspace(istate, "%s\n", str); … … 339 358 } 340 359 341 void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) 360 void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t 361 tag, const char *str) 342 362 { 343 363 uintptr_t va; … … 345 365 va = tag.vpn << PAGE_WIDTH; 346 366 347 fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); 367 fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, 368 tag.context); 348 369 dump_istate(istate); 349 370 printf("Faulting page: %p, ASID=%d\n", va, tag.context); … … 351 372 } 352 373 353 void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) 374 void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t 375 tag, const char *str) 354 376 { 355 377 uintptr_t va; … … 357 379 va = tag.vpn << PAGE_WIDTH; 358 380 359 fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); 381 fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, 382 tag.context); 360 383 printf("Faulting page: %p, ASID=%d\n", va, tag.context); 361 384 dump_istate(istate); … … 371 394 sfar = dtlb_sfar_read(); 372 395 373 printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, fv=%d\n", 374 sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv); 396 printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, " 397 "fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, 398 sfsr.ow, sfsr.fv); 375 399 printf("DTLB SFAR: address=%p\n", sfar); 376 400 … … 407 431 } 408 432 409 /** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context). 433 /** Invalidate all ITLB and DTLB entries that belong to specified ASID 434 * (Context). 410 435 * 411 436 * @param asid Address Space ID. … … 430 455 } 431 456 432 /** Invalidate all ITLB and DTLB entries for specified page range in specified address space. 457 /** Invalidate all ITLB and DTLB entries for specified page range in specified 458 * address space. 433 459 * 434 460 * @param asid Address Space ID. … … 449 475 450 476 for (i = 0; i < cnt; i++) { 451 itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); 452 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); 477 itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * 478 PAGE_SIZE); 479 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * 480 PAGE_SIZE); 453 481 } 454 482
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