Changeset 7785e951 in mainline
- Timestamp:
- 2011-10-24T15:59:20Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 0b4f060
- Parents:
- b7f7183
- Location:
- uspace/drv/audio/sb16
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/audio/sb16/dma_controller.c
rb7f7183 r7785e951 217 217 } 218 218 /*----------------------------------------------------------------------------*/ 219 int dma_setup_channel(unsigned channel, uintptr_t pa, uint16_t size) 219 int dma_setup_channel( 220 unsigned channel, uintptr_t pa, uint16_t size, uint8_t mode) 220 221 { 221 222 if (channel == 0 || channel == 4) … … 242 243 const dma_channel_t dma_channel = controller_8237.channels[channel]; 243 244 244 ddf_log_debug("Setting channel %u, to address %p(%zu).\n", 245 channel, pa, size); 245 ddf_log_debug("Setting channel %u, to address %p(%zu), mode %hhx.\n", 246 channel, pa, size, mode); 247 246 248 /* Mask DMA request */ 247 249 uint8_t value = DMA_SINGLE_MASK_CHAN_TO_REG(channel) … … 249 251 pio_write_8(dma_channel.single_mask_address, value); 250 252 253 /* Set mode */ 254 value = DMA_MODE_CHAN_TO_REG(channel) | mode; 255 pio_write_8(dma_channel.mode_address, value); 256 251 257 /* Set address -- reset flip-flop*/ 252 258 pio_write_8(dma_channel.flip_flop_address, 0); … … 279 285 ddf_log_verbose("Writing size high byte: %hhx.\n", value); 280 286 pio_write_8(dma_channel.offset_reg_address, value); 281 282 /* Unmask DMA request */283 value = DMA_SINGLE_MASK_CHAN_TO_REG(channel);284 pio_write_8(dma_channel.single_mask_address, value);285 286 return EOK;287 }288 /*----------------------------------------------------------------------------*/289 int dma_prepare_channel(290 unsigned channel, bool write, bool auto_mode, transfer_mode_t mode)291 {292 if (channel == 0 || channel == 4)293 return ENOTSUP;294 if (channel > 7)295 return ENOENT;296 297 if (!controller_8237.initialized)298 return EIO;299 300 const dma_channel_t dma_channel = controller_8237.channels[channel];301 302 /* Mask DMA request */303 uint8_t value = DMA_SINGLE_MASK_CHAN_TO_REG(channel)304 | DMA_SINGLE_MASK_MASKED_FLAG;305 pio_write_8(dma_channel.single_mask_address, value);306 307 /* Set DMA mode */308 value = DMA_MODE_CHAN_TO_REG(channel)309 | ((write ? DMA_MODE_CHAN_TRA_WRITE : DMA_MODE_CHAN_TRA_READ)310 << DMA_MODE_CHAN_TRA_SHIFT)311 | (auto_mode ? DMA_MODE_CHAN_AUTO_FLAG : 0)312 | (mode << DMA_MODE_CHAN_MODE_SHIFT);313 ddf_log_verbose("Setting DMA mode: %hhx.\n", value);314 pio_write_8(dma_channel.mode_address, value);315 287 316 288 /* Unmask DMA request */ -
uspace/drv/audio/sb16/dma_controller.h
rb7f7183 r7785e951 43 43 } transfer_mode_t; 44 44 45 int dma_setup_channel(unsigned channel, uintptr_t pa, uint16_t size); 45 #define DMA_MODE_WRITE (1 << 2) 46 #define DMA_MODE_READ (1 << 3) 47 #define DMA_MODE_AUTO (1 << 4) 48 #define DMA_MODE_DOWN (1 << 5) 49 #define DMA_MODE_SINGLE (1 << 6) 50 #define DMA_MODE_BLOCK (1 << 7) 46 51 47 int dma_prepare_channel( 48 unsigned channel, bool write, bool auto_mode, transfer_mode_t mode); 49 52 int dma_setup_channel( 53 unsigned channel, uintptr_t pa, uint16_t size, uint8_t mode); 50 54 #endif 51 55 /** -
uspace/drv/audio/sb16/dsp.c
rb7f7183 r7785e951 115 115 const uintptr_t pa = addr_to_phys(buffer); 116 116 assert(pa < (1 << 25)); 117 // assert((pa & 0xffff) == 0);118 117 /* Set 16 bit channel */ 119 const int ret = dma_setup_channel(SB_DMA_CHAN_16, pa, BUFFER_SIZE); 118 const int ret = dma_setup_channel(SB_DMA_CHAN_16, pa, BUFFER_SIZE, 119 DMA_MODE_READ | DMA_MODE_AUTO | DMA_MODE_SINGLE); 120 120 if (ret == EOK) { 121 121 dsp->buffer.data = buffer; … … 123 123 dsp->buffer.size = BUFFER_SIZE; 124 124 bzero(buffer, BUFFER_SIZE); 125 dma_prepare_channel(126 SB_DMA_CHAN_16, false, AUTO_DMA_MODE, BLOCK_DMA);127 /* Set 8bit channel */128 const int ret = dma_setup_channel(SB_DMA_CHAN_8, pa, BUFFER_SIZE);129 if (ret == EOK) {130 dma_prepare_channel(131 SB_DMA_CHAN_8, false, AUTO_DMA_MODE, BLOCK_DMA);132 } else {133 ddf_log_warning("Failed to setup DMA8 channel: %s.\n",134 str_error(ret));135 }136 125 } else { 137 126 ddf_log_error("Failed to setup DMA16 channel %s.\n", … … 275 264 dsp->playing.mode = 276 265 (bit_depth == 16 ? 0x10 : 0) | (channels == 2 ? 0x20 : 0); 277 ddf_log_debug("Setting mode %hhx.\n", dsp->playing.mode);266 ddf_log_debug("Setting DSP mode %hhx.\n", dsp->playing.mode); 278 267 279 268 ddf_log_debug("Playing sound: %zu(%zu) bytes.\n", play_size, size); … … 287 276 sampling_rate >> 8, sampling_rate & 0xff); 288 277 289 if (AUTO_DMA_MODE) { 278 if (!AUTO_DMA_MODE || play_size == size) { 279 sb_dsp_write(dsp, SINGLE_DMA_16B_DA_FIFO); 280 } else { 290 281 sb_dsp_write(dsp, AUTO_DMA_16B_DA_FIFO); 291 } else {292 sb_dsp_write(dsp, SINGLE_DMA_16B_DA_FIFO);293 282 } 294 283 sb_dsp_write(dsp, dsp->playing.mode);
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